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CYSBSYSKIT_01 targets.json and bsp update.
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-77
lines changed

5 files changed

+11
-77
lines changed

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c

Lines changed: 0 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -26,40 +26,3 @@
2626

2727
#include "cycfg_system.h"
2828

29-
#define CY_CFG_PWR_ENABLED 1
30-
#define CY_CFG_PWR_INIT 1
31-
#define CY_CFG_PWR_USING_PMIC 0
32-
#define CY_CFG_PWR_VBACKUP_USING_VDDD 0
33-
#define CY_CFG_PWR_LDO_VOLTAGE CY_SYSPM_LDO_VOLTAGE_LP
34-
#define CY_CFG_PWR_USING_ULP 0
35-
36-
__STATIC_INLINE void init_cycfg_power(void)
37-
{
38-
/* Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD */
39-
#if (CY_CFG_PWR_VBACKUP_USING_VDDD)
40-
if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)
41-
{
42-
Cy_SysLib_ResetBackupDomain();
43-
Cy_SysClk_IloDisable();
44-
Cy_SysClk_IloInit();
45-
}
46-
#else /* Dedicated Supply */
47-
Cy_SysPm_BackupSetSupply(CY_SYSPM_VDDBACKUP_VBACKUP);
48-
#endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
49-
50-
/* Configure core regulator */
51-
#if CY_CFG_PWR_USING_LDO
52-
Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP);
53-
Cy_SysPm_LdoSetMode(CY_SYSPM_LDO_MODE_NORMAL);
54-
#else
55-
Cy_SysPm_BuckEnable(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP);
56-
#endif /* CY_CFG_PWR_USING_LDO */
57-
/* Configure PMIC */
58-
Cy_SysPm_UnlockPmic();
59-
#if CY_CFG_PWR_USING_PMIC
60-
Cy_SysPm_PmicEnableOutput();
61-
#else
62-
Cy_SysPm_PmicDisableOutput();
63-
#endif /* CY_CFG_PWR_USING_PMIC */
64-
}
65-

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -28,29 +28,11 @@
2828
#define CYCFG_SYSTEM_H
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3030
#include "cycfg_notices.h"
31-
#include "cy_syspm.h"
32-
3331
#if defined(__cplusplus)
3432
extern "C" {
3533
#endif
3634

3735
#define cpuss_0_dap_0_ENABLED 1U
38-
#define srss_0_power_0_ENABLED 1U
39-
#define CY_CFG_PWR_MODE_LP 0x01UL
40-
#define CY_CFG_PWR_MODE_ULP 0x02UL
41-
#define CY_CFG_PWR_MODE_ACTIVE 0x04UL
42-
#define CY_CFG_PWR_MODE_SLEEP 0x08UL
43-
#define CY_CFG_PWR_MODE_DEEPSLEEP 0x10UL
44-
#define CY_CFG_PWR_SYS_IDLE_MODE CY_CFG_PWR_MODE_SLEEP
45-
#define CY_CFG_PWR_SYS_ACTIVE_MODE CY_CFG_PWR_MODE_LP
46-
#define CY_CFG_PWR_DEEPSLEEP_LATENCY 0UL
47-
#define CY_CFG_PWR_USING_LDO 1
48-
#define CY_CFG_PWR_VDDA_MV 3300
49-
#define CY_CFG_PWR_VDDD_MV 1800
50-
#define CY_CFG_PWR_VBACKUP_MV 1800
51-
#define CY_CFG_PWR_VDD_NS_MV 1800
52-
#define CY_CFG_PWR_VDDIO0_MV 1800
53-
#define CY_CFG_PWR_VDDIO1_MV 3300
5436

5537

5638
#if defined(__cplusplus)

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/design.modus

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -84,23 +84,6 @@
8484
<Block location="ioss[0].port[8].pin[7]">
8585
<Alias value="CYBSP_CSD_SLD4"/>
8686
</Block>
87-
<Block location="srss[0].power[0]">
88-
<Personality template="mxs40power" version="1.2">
89-
<Param id="pwrMode" value="LDO_1_1"/>
90-
<Param id="actPwrMode" value="LP"/>
91-
<Param id="coreRegulator" value="CY_SYSPM_LDO_MODE_NORMAL"/>
92-
<Param id="pmicEnable" value="false"/>
93-
<Param id="backupSrc" value="DEDICATED"/>
94-
<Param id="idlePwrMode" value="CY_CFG_PWR_MODE_SLEEP"/>
95-
<Param id="deepsleepLatency" value="0"/>
96-
<Param id="vddaMv" value="3300"/>
97-
<Param id="vdddMv" value="1800"/>
98-
<Param id="vBackupMv" value="1800"/>
99-
<Param id="vddNsMv" value="1800"/>
100-
<Param id="vddio0Mv" value="1800"/>
101-
<Param id="vddio1Mv" value="3300"/>
102-
</Personality>
103-
</Block>
10487
</BlockConfig>
10588
<Netlist>
10689
<Net>
@@ -117,10 +100,6 @@
117100
</Net>
118101
</Netlist>
119102
</Device>
120-
<Device mpn="CYW43012TC0KFFBH">
121-
<BlockConfig/>
122-
<Netlist/>
123-
</Device>
124103
</Devices>
125104
<Libraries/>
126105
<ConfiguratorData/>

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/cybsp.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,10 @@
3131
#include "cyhal_hwmgr.h"
3232
#endif
3333

34+
#if !defined (CY_CFG_PWR_SYS_IDLE_MODE)
35+
#include "mbed_power_mgmt.h"
36+
#endif
37+
3438
#if defined(__cplusplus)
3539
extern "C" {
3640
#endif
@@ -94,6 +98,11 @@ cy_rslt_t cybsp_init(void)
9498
result = cybsp_register_sysclk_pm_callback();
9599
}
96100

101+
#if !defined(CY_CFG_PWR_SYS_IDLE_MODE)
102+
/* Disable deep-sleep. */
103+
sleep_manager_lock_deep_sleep();
104+
#endif
105+
97106
/* CYHAL_HWMGR_RSLT_ERR_INUSE error code could be returned if any needed for BSP resource was reserved by
98107
* user previously. Please review the Device Configurator (design.modus) and the BSP reservation list
99108
* (cyreservedresources.list) to make sure no resources are reserved by both.

targets/targets.json

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14016,7 +14016,8 @@
1401614016
"CYBSP_WIFI_CAPABLE"
1401714017
],
1401814018
"overrides": {
14019-
"network-default-interface-type": "WIFI"
14019+
"network-default-interface-type": "WIFI",
14020+
"deep-sleep-latency": 0
1402014021
},
1402114022
"detect_code": [
1402214023
"1912"

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