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| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2016 ARM Limited |
| 3 | + * |
| 4 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + * you may not use this file except in compliance with the License. |
| 6 | + * You may obtain a copy of the License at |
| 7 | + * |
| 8 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | + * |
| 10 | + * Unless required by applicable law or agreed to in writing, software |
| 11 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | + |
| 17 | +#if DEVICE_LOWPOWERTIMER |
| 18 | + |
| 19 | +#include "lp_ticker_api.h" |
| 20 | +#include "fsl_rtc.h" |
| 21 | +#include "fsl_lptmr.h" |
| 22 | +#include "cmsis.h" |
| 23 | +#include "rtc_api.h" |
| 24 | + |
| 25 | +#define MAX_SEC_BITS (12) |
| 26 | +#define MAX_SEC_MASK ((1 << MAX_SEC_BITS) - 1) |
| 27 | +#define SEC_IN_USEC (1000000) |
| 28 | +#define OSC32K_CLK_HZ (32768) |
| 29 | +#define MAX_LPTMR_SLEEP ((1 << 16) - 1) |
| 30 | + |
| 31 | +static bool lp_ticker_inited = false; |
| 32 | +static int lptmr_schedule = 0; |
| 33 | + |
| 34 | +static void rtc_isr(void) |
| 35 | +{ |
| 36 | + RTC_DisableInterrupts(RTC, kRTC_AlarmInterruptEnable); |
| 37 | + RTC->TAR = 0; /* Write clears the IRQ flag */ |
| 38 | + |
| 39 | + /* Wait subsecond remainder if any */ |
| 40 | + if (lptmr_schedule) { |
| 41 | + LPTMR_SetTimerPeriod(LPTMR0, lptmr_schedule); |
| 42 | + LPTMR_EnableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable); |
| 43 | + LPTMR_StartTimer(LPTMR0); |
| 44 | + } else { |
| 45 | + lp_ticker_irq_handler(); |
| 46 | + } |
| 47 | +} |
| 48 | + |
| 49 | +static void lptmr_isr(void) |
| 50 | +{ |
| 51 | + LPTMR_ClearStatusFlags(LPTMR0, kLPTMR_TimerCompareFlag); |
| 52 | + LPTMR_StopTimer(LPTMR0); |
| 53 | + |
| 54 | + lp_ticker_irq_handler(); |
| 55 | +} |
| 56 | + |
| 57 | +/** Initialize the low power ticker |
| 58 | + * |
| 59 | + */ |
| 60 | +void lp_ticker_init(void) |
| 61 | +{ |
| 62 | + lptmr_config_t lptmrConfig; |
| 63 | + |
| 64 | + if (lp_ticker_inited) { |
| 65 | + return; |
| 66 | + } |
| 67 | + lp_ticker_inited = true; |
| 68 | + |
| 69 | + /* Setup low resolution clock - RTC */ |
| 70 | + if (!rtc_isenabled()) { |
| 71 | + rtc_init(); |
| 72 | + RTC_DisableInterrupts(RTC, kRTC_AlarmInterruptEnable | kRTC_SecondsInterruptEnable); |
| 73 | + RTC_StartTimer(RTC); |
| 74 | + } |
| 75 | + |
| 76 | + NVIC_ClearPendingIRQ(RTC_IRQn); |
| 77 | + NVIC_SetVector(RTC_IRQn, (uint32_t)rtc_isr); |
| 78 | + NVIC_EnableIRQ(RTC_IRQn); |
| 79 | + |
| 80 | + /* Setup high resolution clock - LPTMR */ |
| 81 | + LPTMR_GetDefaultConfig(&lptmrConfig); |
| 82 | + /* Use 32kHz drive */ |
| 83 | + CLOCK_SetXtal32Freq(OSC32K_CLK_HZ); |
| 84 | + lptmrConfig.prescalerClockSource = kLPTMR_PrescalerClock_2; |
| 85 | + LPTMR_Init(LPTMR0, &lptmrConfig); |
| 86 | + LPTMR_EnableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable); |
| 87 | + NVIC_ClearPendingIRQ(LPTMR0_IRQn); |
| 88 | + NVIC_SetVector(LPTMR0_IRQn, (uint32_t)lptmr_isr); |
| 89 | + EnableIRQ(LPTMR0_IRQn); |
| 90 | +} |
| 91 | + |
| 92 | +/** Read the current counter |
| 93 | + * |
| 94 | + * @return The current timer's counter value in microseconds |
| 95 | + */ |
| 96 | +uint32_t lp_ticker_read(void) |
| 97 | +{ |
| 98 | + uint32_t sec, pre; |
| 99 | + |
| 100 | + if (!lp_ticker_inited) { |
| 101 | + lp_ticker_init(); |
| 102 | + } |
| 103 | + |
| 104 | + sec = RTC->TSR; /* 32b: Seconds */ |
| 105 | + pre = RTC->TPR; /* 16b: Increments every 32.768kHz clock cycle (30us) */ |
| 106 | + |
| 107 | + /* Final value: 11b (4095) for sec and 21b for usec (pre can reach 1,000,000us which is close to 1<<20) */ |
| 108 | + uint32_t ret = (((sec & MAX_SEC_MASK) * SEC_IN_USEC) + (((uint64_t)pre * SEC_IN_USEC) / OSC32K_CLK_HZ)); |
| 109 | + |
| 110 | + return ret; |
| 111 | +} |
| 112 | + |
| 113 | +/** Set interrupt for specified timestamp |
| 114 | + * |
| 115 | + * @param timestamp The time in microseconds to be set |
| 116 | + */ |
| 117 | +void lp_ticker_set_interrupt(timestamp_t timestamp) |
| 118 | +{ |
| 119 | + uint32_t now_us, delta_us, delta_ticks; |
| 120 | + |
| 121 | + if (!lp_ticker_inited) { |
| 122 | + lp_ticker_init(); |
| 123 | + } |
| 124 | + |
| 125 | + lptmr_schedule = 0; |
| 126 | + now_us = lp_ticker_read(); |
| 127 | + delta_us = timestamp > now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us); |
| 128 | + |
| 129 | + /* Checking if LPTRM can handle this sleep */ |
| 130 | + delta_ticks = USEC_TO_COUNT(delta_us, CLOCK_GetFreq(kCLOCK_Er32kClk)); |
| 131 | + if (delta_ticks > MAX_LPTMR_SLEEP) { |
| 132 | + /* Using RTC if wait time is over 16b (2s @32kHz) */ |
| 133 | + uint32_t delta_sec; |
| 134 | + |
| 135 | + delta_us += COUNT_TO_USEC(RTC->TPR, CLOCK_GetFreq(kCLOCK_Er32kClk)); /* Accounting for started second */ |
| 136 | + delta_sec = delta_us / SEC_IN_USEC; |
| 137 | + delta_us -= delta_sec * SEC_IN_USEC; |
| 138 | + |
| 139 | + RTC->TAR = RTC->TSR + delta_sec - 1; |
| 140 | + |
| 141 | + RTC_EnableInterrupts(RTC, kRTC_AlarmInterruptEnable); |
| 142 | + |
| 143 | + /* Set aditional, subsecond, sleep time */ |
| 144 | + if (delta_us) { |
| 145 | + lptmr_schedule = USEC_TO_COUNT(delta_us, CLOCK_GetFreq(kCLOCK_Er32kClk)); |
| 146 | + } |
| 147 | + } else { |
| 148 | + /* Below RTC resolution using LPTMR */ |
| 149 | + LPTMR_SetTimerPeriod(LPTMR0, delta_ticks); |
| 150 | + LPTMR_EnableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable); |
| 151 | + LPTMR_StartTimer(LPTMR0); |
| 152 | + } |
| 153 | +} |
| 154 | + |
| 155 | +/** Disable low power ticker interrupt |
| 156 | + * |
| 157 | + */ |
| 158 | +void lp_ticker_disable_interrupt(void) |
| 159 | +{ |
| 160 | + LPTMR_DisableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable); |
| 161 | + RTC_DisableInterrupts(RTC, kRTC_AlarmInterruptEnable); |
| 162 | +} |
| 163 | + |
| 164 | +/** Clear the low power ticker interrupt |
| 165 | + * |
| 166 | + */ |
| 167 | +void lp_ticker_clear_interrupt(void) |
| 168 | +{ |
| 169 | + RTC->TAR = 0; /* Write clears the IRQ flag */ |
| 170 | + LPTMR_ClearStatusFlags(LPTMR0, kLPTMR_TimerCompareFlag); |
| 171 | +} |
| 172 | +#endif /* DEVICE_LOWPOWERTIMER */ |
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