[NUCLEO_F401RE] Restart PLL after deepsleep

Author: bcostm

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/system_stm32f4xx.c

@@ -126,7 +126,7 @@
   */
 
 /* [ADDED FOR MBED] */
-static void SystemClock_Config(void);
+void SystemClock_Config(void);
 
 /**
   * @}
@@ -266,7 +266,7 @@ void SystemCoreClockUpdate(void)
 
 /* [ADDED FOR MBED]
    Configure the System clock to 84 MHz (max value) using the internal HSI 16 MHz clock */
-static void SystemClock_Config(void)
+void SystemClock_Config(void)
 {
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_OscInitTypeDef RCC_OscInitStruct;

libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F401RE/sleep.c

@@ -31,6 +31,9 @@
 #include "cmsis.h"
 #include "stm32f4xx_hal.h"
 
+// This function is in the system_stm32f4xx.c file
+extern void SystemClock_Config(void);
+
 static TIM_HandleTypeDef TimMasterHandle;
 
 void sleep(void)
@@ -43,4 +46,6 @@ void deepsleep(void)
 {
     // Request to enter STOP mode with regulator in low power mode
     HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
+    // After wake-up from STOP reconfigure the PLL
+    SystemClock_Config();
 }