[NUCLEO_F401RE] Update STM32CubeF4 driver V1.0.0 (part 3/4)

Author: bcostm

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_nand.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nand.c
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   NAND HAL module driver.
   *          This file provides a generic firmware to drive NAND memories mounted 
   *          as external device.
@@ -154,13 +154,12 @@ HAL_StatusTypeDef  HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingT
   FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank);
 
   /* Enable the NAND device */
-  __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);   
+  __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank);
 
   /* Update the NAND controller state */
-  hnand->State = HAL_NAND_STATE_READY;  
-  
-  return HAL_OK;
+  hnand->State = HAL_NAND_STATE_READY;
 
+  return HAL_OK;
 }
 
 /**
@@ -172,12 +171,17 @@ HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand)
 {
   /* Initialize the low level hardware (MSP) */
   HAL_NAND_MspDeInit(hnand);
-  
+
   /* Configure the NAND registers with their reset values */
   FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank);
 
-  return HAL_OK;  
-  
+  /* Reset the NAND controller state */
+  hnand->State = HAL_NAND_STATE_RESET;
+
+  /* Release Lock */
+  __HAL_UNLOCK(hnand);
+
+  return HAL_OK;
 }
 
 /**

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_nand.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nand.h
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   Header file of NAND HAL module.
   ******************************************************************************
   * @attention
@@ -193,10 +193,10 @@ typedef struct
 /* Initialization/de-initialization functions  **********************************/
 HAL_StatusTypeDef  HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
 HAL_StatusTypeDef  HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
-__weak void        HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
-__weak void        HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
+void        HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
+void        HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
 void               HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
-__weak void        HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
+void        HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
 
 /* IO operation functions  *****************************************************/
 HAL_StatusTypeDef  HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_nor.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nor.c
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   NOR HAL module driver.
   *          This file provides a generic firmware to drive NOR memories mounted 
   *          as external device.
@@ -94,12 +94,11 @@
   * @{
   */
 #ifdef HAL_NOR_MODULE_ENABLED
-
 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/    
+/* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
 
@@ -144,7 +143,7 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDe
   {
     /* Initialize the low level hardware (MSP) */
     HAL_NOR_MspInit(hnor);
-  }    
+  }
 
   /* Initialize NOR control Interface */
   FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
@@ -154,15 +153,14 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDe
 
   /* Initialize NOR extended mode timing Interface */
   FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
-  
+
   /* Enable the NORSRAM device */
   __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);  
-  
+
   /* Check the NOR controller state */
   hnor->State = HAL_NOR_STATE_READY; 
 
   return HAL_OK;
-
 }
 
 /**
@@ -172,18 +170,18 @@ HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDe
   */
 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)  
 {
-  /* Update the NOR controller state */
-  hnor->State = HAL_NOR_STATE_BUSY;
-  
   /* De-Initialize the low level hardware (MSP) */
   HAL_NOR_MspDeInit(hnor);
 
   /* Configure the NOR registers with their reset values */
   FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
 
   /* Update the NOR controller state */
-  hnor->State = HAL_NOR_STATE_READY;  
-    
+  hnor->State = HAL_NOR_STATE_RESET;
+
+  /* Release Lock */
+  __HAL_UNLOCK(hnor);
+
   return HAL_OK;
 }
 
@@ -309,7 +307,6 @@ HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
   return HAL_OK;
 }
 
-
 /**
   * @brief  Read data from NOR memory 
   * @param  hnor: pointer to NOR handle
@@ -348,7 +345,6 @@ HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint
   return HAL_OK;  
 }
 
-
 /**
   * @brief  Program data to NOR memory 
   * @param  hnor: pointer to NOR handle
@@ -387,7 +383,6 @@ HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, u
   return HAL_OK;  
 }
 
-
 /**
   * @brief  Reads a block of data from the FMC NOR memory.
   * @param  hnor: pointer to NOR handle
@@ -433,7 +428,6 @@ HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress
   return HAL_OK;  
 }
 
-
 /**
   * @brief  Writes a half-word buffer to the FMC NOR memory. This function 
   *         must be used only with S29GL128P NOR memory. 
@@ -536,7 +530,6 @@ HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAdd
 
 }
 
-
 /**
   * @brief  Erase the entire NOR chip.
   * @param  hnor: pointer to NOR handle
@@ -574,7 +567,6 @@ HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
   return HAL_OK;  
 }
 
-
 /**
   * @brief  Read NOR flash CFI IDs
   * @param  hnor: pointer to NOR handle
@@ -613,7 +605,6 @@ HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR
   return HAL_OK;
 }
 
-
 /**
   * @}
   */
@@ -624,7 +615,7 @@ HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR
 @verbatim   
   ==============================================================================
                         ##### NOR Control functions #####
-  ==============================================================================  
+  ==============================================================================
   [..]
     This subsection provides a set of functions allowing to control dynamically
     the NOR interface.

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_nor.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_nor.h
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   Header file of NOR HAL module.
   ******************************************************************************
   * @attention
@@ -190,16 +190,16 @@ typedef struct
   * @param  __DATA__: Data to write
   * @retval None
   */
-#define __NOR_WRITE(__ADDRESS__, __DATA__)  (*(__IO uint32_t *)(__ADDRESS__) = (__DATA__))
+#define __NOR_WRITE(__ADDRESS__, __DATA__)  (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
 
 /* Exported functions --------------------------------------------------------*/
 
 /* Initialization/de-initialization functions  **********************************/  
 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
-__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
-__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
-__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
+void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
+void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
+void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
 
 /* I/O operation functions  *****************************************************/
 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_pccard.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pccard.c
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   PCCARD HAL module driver.
   *          This file provides a generic firmware to drive PCCARD memories mounted 
   *          as external device.
@@ -86,12 +86,11 @@
   * @{
   */
 #ifdef HAL_PCCARD_MODULE_ENABLED
-
 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/    
+/* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
@@ -169,18 +168,18 @@ HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_Ti
   */
 HAL_StatusTypeDef  HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard)
 {
-  /* Update the PCCARD controller state */
-  hpccard->State = HAL_PCCARD_STATE_BUSY;
-  
   /* De-Initialize the low level hardware (MSP) */
-  HAL_PCCARD_MspDeInit(hpccard);  
+  HAL_PCCARD_MspDeInit(hpccard);
 
   /* Configure the PCCARD registers with their reset values */
   FMC_PCCARD_DeInit(hpccard->Instance);
 
   /* Update the PCCARD controller state */
   hpccard->State = HAL_PCCARD_STATE_RESET;
-    
+
+  /* Release Lock */
+  __HAL_UNLOCK(hpccard);
+
   return HAL_OK; 
 }
 

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_pccard.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f4xx_hal_pccard.h
   * @author  MCD Application Team
-  * @version V1.0.0RC2
-  * @date    04-February-2014
+  * @version V1.0.0
+  * @date    18-February-2014
   * @brief   Header file of PCCARD HAL module.
   ******************************************************************************
   * @attention
@@ -143,8 +143,8 @@ typedef struct
 /* Initialization/de-initialization functions  **********************************/
 HAL_StatusTypeDef  HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming);
 HAL_StatusTypeDef  HAL_PCCARD_DeInit(PCCARD_HandleTypeDef *hpccard);   
-__weak void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard);
-__weak void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard);
+void HAL_PCCARD_MspInit(PCCARD_HandleTypeDef *hpccard);
+void HAL_PCCARD_MspDeInit(PCCARD_HandleTypeDef *hpccard);
 
 /* IO operation functions  *****************************************************/
 HAL_StatusTypeDef  HAL_CF_Read_ID(PCCARD_HandleTypeDef *hpccard, uint8_t CompactFlash_ID[], uint8_t *pStatus);
@@ -153,7 +153,7 @@ HAL_StatusTypeDef  HAL_CF_Read_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t *p
 HAL_StatusTypeDef  HAL_CF_Erase_Sector(PCCARD_HandleTypeDef *hpccard, uint16_t SectorAddress, uint8_t *pStatus);
 HAL_StatusTypeDef  HAL_CF_Reset(PCCARD_HandleTypeDef *hpccard);
 void               HAL_PCCARD_IRQHandler(PCCARD_HandleTypeDef *hpccard);
-__weak void        HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard);
+void        HAL_PCCARD_ITCallback(PCCARD_HandleTypeDef *hpccard);
 
 /* PCCARD State functions *******************************************************/
 HAL_PCCARD_StateTypeDef HAL_PCCARD_GetState(PCCARD_HandleTypeDef *hpccard);