File tree Expand file tree Collapse file tree 2 files changed +6
-6
lines changed
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device Expand file tree Collapse file tree 2 files changed +6
-6
lines changed Original file line number Diff line number Diff line change 1
1
; Scatter-Loading Description File
2
2
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3
- ; Copyright (c) 2015 , STMicroelectronics
3
+ ; Copyright (c) 2018 , STMicroelectronics
4
4
; All rights reserved.
5
5
;
6
6
; Redistribution and use in source and binary forms, with or without
27
27
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
28
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
29
29
30
- ; 1MB FLASH (0x100000) + 320KB SRAM (0xxxxx )
30
+ ; 1MB FLASH (0x100000) + 320KB SRAM (0x50000 )
31
31
LR_IROM1 0x08000000 0x100000 { ; load region size_region
32
32
33
33
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
@@ -37,7 +37,7 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region
37
37
}
38
38
39
39
; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
40
- RW_IRAM1 (0x20000000+0x1AC) (0x00500000 -0x1AC) { ; RW data 320k L4-SRAM1
40
+ RW_IRAM1 (0x20000000+0x1AC) (0x50000 -0x1AC) { ; RW data 320k L4-SRAM1
41
41
.ANY (+RW +ZI)
42
42
}
43
43
}
Original file line number Diff line number Diff line change 1
1
; Scatter-Loading Description File
2
2
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3
- ; Copyright (c) 2015 , STMicroelectronics
3
+ ; Copyright (c) 2018 , STMicroelectronics
4
4
; All rights reserved.
5
5
;
6
6
; Redistribution and use in source and binary forms, with or without
27
27
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
28
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
29
29
30
- ; 1MB FLASH (0x100000) + 320KB SRAM (0xxxxx )
30
+ ; 1MB FLASH (0x100000) + 320KB SRAM (0x50000 )
31
31
LR_IROM1 0x08000000 0x100000 { ; load region size_region
32
32
33
33
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
@@ -37,7 +37,7 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region
37
37
}
38
38
39
39
; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
40
- RW_IRAM1 (0x20000000+0x1AC) (0x00500000 -0x1AC) { ; RW data 320k L4-SRAM1
40
+ RW_IRAM1 (0x20000000+0x1AC) (0x50000 -0x1AC) { ; RW data 320k L4-SRAM1
41
41
.ANY (+RW +ZI)
42
42
}
43
43
}
You can’t perform that action at this time.
0 commit comments