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targets/TARGET_STM/TARGET_STM32L4
TARGET_STM32L432xC/device
TARGET_STM32L476xG/device
TARGET_STM32L486xG/device Expand file tree Collapse file tree 3 files changed +9
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#define TIM_MST TIM2
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#define TIM_MST_IRQ TIM2_IRQn
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- #define TIM_MST_RCC __TIM2_CLK_ENABLE ()
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+ #define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE ()
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- #define TIM_MST_RESET_ON __TIM2_FORCE_RESET ()
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- #define TIM_MST_RESET_OFF __TIM2_RELEASE_RESET ()
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+ #define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET ()
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+ #define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET ()
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#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
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#define TIM_MST TIM5
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#define TIM_MST_IRQ TIM5_IRQn
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- #define TIM_MST_RCC __TIM5_CLK_ENABLE ()
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+ #define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE ()
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- #define TIM_MST_RESET_ON __TIM5_FORCE_RESET ()
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- #define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET ()
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+ #define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET ()
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+ #define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET ()
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#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
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#define TIM_MST TIM5
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#define TIM_MST_IRQ TIM5_IRQn
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- #define TIM_MST_RCC __TIM5_CLK_ENABLE ()
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+ #define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE ()
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- #define TIM_MST_RESET_ON __TIM5_FORCE_RESET ()
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- #define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET ()
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+ #define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET ()
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+ #define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET ()
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#define TIM_MST_16BIT 0 // 1=16-bit timer, 0=32-bit timer
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