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M487: Adjust placement of SYS_UnlockReg in WDT reset from PD patch
This adjustment has two purposes: 1. Avoid misleading placement of SYS_UnlockReg for WDT clock setting 2. Safer for power-down
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targets/TARGET_NUVOTON/TARGET_M480/mbed_overrides.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,9 @@ void mbed_sdk_init(void)
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* start of boot process on detecting WDT reset.
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*/
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if (SYS_IS_WDT_RST()) {
95+
/* Re-unlock to highlight WDT clock setting is protected */
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SYS_UnlockReg();
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/* Enable IP module clock */
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CLK_EnableModuleClock(WDT_MODULE);
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@@ -106,8 +109,6 @@ void mbed_sdk_init(void)
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*/
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NVIC_EnableIRQ(WDT_IRQn);
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109-
SYS_UnlockReg();
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111112
/* Configure/Enable WDT */
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WDT->CTL = WDT_TIMEOUT_2POW4 | // Timeout interval of 2^4 LIRC clocks
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WDT_CTL_WDTEN_Msk | // Enable watchdog timer
@@ -121,6 +122,9 @@ void mbed_sdk_init(void)
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CLK_PowerDown();
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/* Re-unlock for safe */
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SYS_UnlockReg();
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/* Clear all flags & Disable WDT/INT/WK/RST */
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WDT->CTL = (WDT_CTL_WKF_Msk | WDT_CTL_IF_Msk | WDT_CTL_RSTF_Msk | WDT_CTL_RSTCNT_Msk);
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