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/* * \brief PHY ID definitions */
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#define DP83848C_ID 0x20005C90 /* *< PHY Identifier - DP83848C */
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#define LAN8720_ID 0x0007C0F0 /* *< PHY Identifier - LAN8720 */
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+ #define KSZ8041_ID 0x00221510 /* *< PHY Identifier - KSZ8041 */
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/* * \brief PHY status structure used to indicate current status of PHY.
@@ -350,9 +351,11 @@ bool lpc_phy_init(LPC17_EMAC *lpc17_emac, int rmii)
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lpc_mii_write (DP8_BMCR_REG, tmp);
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/* Enable RMII mode for PHY */
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- if (rmii)
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- lpc_mii_write (DP8_PHY_RBR_REG, DP8_RBR_RMII_MODE);
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-
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+ if (rmii) {
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+ /* Mode is set with config pins on KSZ8041 */
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+ if (phy_id != KSZ8041_ID)
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+ lpc_mii_write (DP8_PHY_RBR_REG, DP8_RBR_RMII_MODE);
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+ }
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/* The link is not set active at this point, but will be detected
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later */
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@@ -377,14 +380,14 @@ int32_t lpc_phy_sts_sm(LPC17_EMAC *lpc17_emac)
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lpc_mii_read_noblock (DP8_PHY_STAT_REG);
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phyustate = 2 ;
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}
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- else if (phy_id == LAN8720_ID) {
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+ else if (phy_id == LAN8720_ID || phy_id == KSZ8041_ID ) {
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lpc_mii_read_noblock (DP8_PHY_SCSR_REG);
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phyustate = 1 ;
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}
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break ;
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case 1 :
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- if (phy_id == LAN8720_ID) {
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+ if (phy_id == LAN8720_ID || phy_id == KSZ8041_ID ) {
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tmp = lpc_mii_read_data ();
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// we get speed and duplex here.
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phy_lan7420_sts_tmp = (tmp & PHY_SCSR_DUPLEX) ? LNK_STAT_FULLDUPLEX : 0 ;
@@ -408,7 +411,7 @@ int32_t lpc_phy_sts_sm(LPC17_EMAC *lpc17_emac)
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data |= (tmp & DP8_FULLDUPLEX) ? LNK_STAT_FULLDUPLEX : 0 ;
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data |= (tmp & DP8_SPEED10MBPS) ? LNK_STAT_SPEED10MPS : 0 ;
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}
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- else if (phy_id == LAN8720_ID) {
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+ else if (phy_id == LAN8720_ID || phy_id == KSZ8041_ID) {
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// we only get the link status here.
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phy_lan7420_sts_tmp |= (tmp & DP8_LINK_STATUS) ? LNK_STAT_VALID : 0 ;
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data = phy_lan7420_sts_tmp;
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