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KL25Z adc channels A
- only channels B were available
1 parent e427866 commit 6127ed3

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2 files changed

+13
-3
lines changed

2 files changed

+13
-3
lines changed

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/PeripheralNames.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,12 +52,15 @@ typedef enum {
5252
PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
5353
} PWMName;
5454

55+
#define CHANNELS_A_SHIFT 5
5556
typedef enum {
5657
ADC0_SE0 = 0,
5758
ADC0_SE3 = 3,
59+
ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
5860
ADC0_SE4b = 4,
5961
ADC0_SE5b = 5,
6062
ADC0_SE6b = 6,
63+
ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
6164
ADC0_SE7b = 7,
6265
ADC0_SE8 = 8,
6366
ADC0_SE9 = 9,

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/analogin_api.c

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,10 @@
2222
static const PinMap PinMap_ADC[] = {
2323
{PTE20, ADC0_SE0, 0},
2424
{PTE22, ADC0_SE3, 0},
25+
{PTE21, ADC0_SE4a, 0},
2526
{PTE29, ADC0_SE4b, 0},
2627
{PTE30, ADC0_SE23, 0},
28+
{PTE23, ADC0_SE7a, 0},
2729
{PTB0, ADC0_SE8, 0},
2830
{PTB1, ADC0_SE9, 0},
2931
{PTB2, ADC0_SE12, 0},
@@ -48,15 +50,20 @@ void analogin_init(analogin_t *obj, PinName pin) {
4850
uint32_t port = (uint32_t)pin >> PORT_SHIFT;
4951
SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
5052

51-
ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc);
53+
uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
54+
if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
55+
cfg2_muxsel = 0;
56+
}
57+
58+
ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
5259

5360
ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
5461
| ADC_CFG1_ADIV(3) // Clock Divide Select: (Input Clock)/8
5562
| ADC_CFG1_ADLSMP_MASK // Long Sample Time
5663
| ADC_CFG1_MODE(3) // (16)bits Resolution
5764
| ADC_CFG1_ADICLK(1); // Input Clock: (Bus Clock)/2
5865

59-
ADC0->CFG2 = ADC_CFG2_MUXSEL_MASK // ADxxb channels are selected
66+
ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
6067
| ADC_CFG2_ADACKEN_MASK // Asynchronous Clock Output Enable
6168
| ADC_CFG2_ADHSC_MASK // High-Speed Configuration
6269
| ADC_CFG2_ADLSTS(0); // Long Sample Time Select
@@ -71,7 +78,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
7178

7279
uint16_t analogin_read_u16(analogin_t *obj) {
7380
// start conversion
74-
ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc);
81+
ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
7582

7683
// Wait Conversion Complete
7784
while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);

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