- Added initialization for Tx Fifo values and provided value for TFWR bits in ENET_TFWR register

Signed-off-by: Sergio Scaglia <[email protected]>

Author: Sergio Scaglia

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/enet/fsl_enet_hal.c

@@ -148,8 +148,8 @@ void enet_hal_config_tx_fifo(uint32_t instance, enet_config_tx_fifo_t *threshold
     BW_ENET_TFWR_STRFWD(instance, thresholdCfg->isStoreForwardEnabled);   /* Set store and forward mode*/
     if(!thresholdCfg->isStoreForwardEnabled)
     {
-        BW_ENET_TFWR_TFWR(instance, thresholdCfg->txFifoWrite);  /* Set transmit FIFO write bytes*/
         assert(thresholdCfg->txFifoWrite <= BM_ENET_TFWR_TFWR);
+        BW_ENET_TFWR_TFWR(instance, thresholdCfg->txFifoWrite);  /* Set transmit FIFO write bytes*/
     }
     BW_ENET_TSEM_TX_SECTION_EMPTY(instance,thresholdCfg->txEmpty);       /* Set transmit FIFO empty threshold*/
     BW_ENET_TAEM_TX_ALMOST_EMPTY(instance,thresholdCfg->txAlmostEmpty);  /* Set transmit FIFO almost empty threshold*/

libraries/net/eth/lwip-eth/arch/TARGET_K64F/fsl_enet_driver.c

@@ -264,6 +264,13 @@ uint32_t enet_mac_configure_fifo_accel(enet_dev_if_t * enetIfPtr)
     {
         return kStatus_ENET_InvalidInput;
     }
+		
+		/* Initialize values that will not be initialized later on */
+    rxFifo.rxEmpty = 0;
+    rxFifo.rxFull = 0;
+    txFifo.isStoreForwardEnabled = 0;
+    txFifo.txFifoWrite = 0;
+    txFifo.txEmpty = 0;
 
     /* Configure tx/rx accelerator*/
     if (enetIfPtr->macCfgPtr->isRxAccelEnabled)
@@ -290,6 +297,16 @@ uint32_t enet_mac_configure_fifo_accel(enet_dev_if_t * enetIfPtr)
           txFifo.isStoreForwardEnabled = 1;
     }
 
+
+    /* Set TFWR value if STRFWD is not being used  */		
+    if (txFifo.isStoreForwardEnabled == 1)
+          txFifo.txFifoWrite = 0;
+    else
+          /* TFWR value is a trade-off between transmit latency and risk of transmit FIFO underrun due to contention for the system bus
+		      TFWR = 15 means transmission will begin once 960 bytes has been written to the Tx FIFO (for frames larger than 960 bytes)
+          See Section 45.4.18 - Transmit FIFO Watermark Register of the K64F Reference Manual for details		*/
+          txFifo.txFifoWrite = 15;
+		
     /* Configure tx/rx FIFO with default value*/
     rxFifo.rxAlmostEmpty = 4;
     rxFifo.rxAlmostFull = 4;