Replaced tabs by spaces

Now Martin is happy :)

Author: Sissors

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/PeripheralNames.h

@@ -23,8 +23,8 @@ extern "C" {
 #endif
 
 typedef enum {
-	OSC32KCLK = 0,
-	RTC_CLKIN = 2
+    OSC32KCLK = 0,
+    RTC_CLKIN = 2
 } RTCName;
 
 typedef enum {
@@ -37,7 +37,7 @@ typedef enum {
 
 typedef enum {
     I2C_0 = (int)I2C0_BASE,
-	I2C_1 = -1
+    I2C_1 = -1
 } I2CName;
 
 typedef enum {

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/PeripheralPins.h

@@ -22,7 +22,7 @@
 
 /************RTC***************/
 static const PinMap PinMap_RTC[] = {
-	{NC, OSC32KCLK, 0},
+    {NC, OSC32KCLK, 0},
 };
 
 /************ADC***************/

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PeripheralNames.h

@@ -23,8 +23,8 @@ extern "C" {
 #endif
 
 typedef enum {
-	OSC32KCLK = 0,
-	RTC_CLKIN = 2
+    OSC32KCLK = 0,
+    RTC_CLKIN = 2
 } RTCName;
 
 typedef enum {
@@ -57,7 +57,7 @@ typedef enum {
     PWM_10 = (2 << TPM_SHIFT) | (1)   // TPM2 CH1
 } PWMName;
 
-#define CHANNELS_A_SHIFT	5
+#define CHANNELS_A_SHIFT    5
 typedef enum {
     ADC0_SE0  =  0,
     ADC0_SE3  =  3,

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PeripheralPins.h

@@ -23,7 +23,7 @@
 
 /************RTC***************/
 static const PinMap PinMap_RTC[] = {
-	{PTC1, RTC_CLKIN, 2},
+    {PTC1, RTC_CLKIN, 2},
 };
 
 /************ADC***************/

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/PeripheralNames.h

@@ -23,8 +23,8 @@ extern "C" {
 #endif
 
 typedef enum {
-	OSC32KCLK = 0,
-	RTC_CLKIN = 2
+    OSC32KCLK = 0,
+    RTC_CLKIN = 2
 } RTCName;
 
 typedef enum {
@@ -57,7 +57,7 @@ typedef enum {
     PWM_10 = (2 << TPM_SHIFT) | (1)   // TPM2 CH1
 } PWMName;
 
-#define CHANNELS_A_SHIFT	5
+#define CHANNELS_A_SHIFT    5
 typedef enum {
     ADC0_SE0  =  0,
     ADC0_SE3  =  3,

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/PeripheralPins.h

@@ -22,7 +22,7 @@
 
 /************RTC***************/
 static const PinMap PinMap_RTC[] = {
-	{PTC1, RTC_CLKIN, 2},
+    {PTC1, RTC_CLKIN, 2},
 };
 
 /************ADC***************/

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/PinNames.h

@@ -197,13 +197,13 @@ typedef enum {
     // mbed original LED naming
     LED1 = LED_GREEN,
     LED2 = LED_RED,
-	LED3 = LED_GREEN,
+    LED3 = LED_GREEN,
     LED4 = LED_RED,
 
     //Push buttons
     SW1 = PTC3,
     SW3 = PTC12,
-	
+    
     // USB Pins
     USBTX = PTA2,
     USBRX = PTA1,

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/analogin_api.c

@@ -21,8 +21,8 @@
 #include "clk_freqs.h"
 #include "PeripheralPins.h"
 
-#define MAX_FADC			6000000
-#define CHANNELS_A_SHIFT 	5
+#define MAX_FADC            6000000
+#define CHANNELS_A_SHIFT     5
 
 
 void analogin_init(analogin_t *obj, PinName pin) {

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/clk_freqs.h

@@ -34,11 +34,11 @@ static uint32_t extosc_frequency(void) {
     if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2))     //MCG clock = external reference clock
         return MCGClock;
 
-	uint32_t divider, multiplier;
-	#ifdef MCG_C5_PLLCLKEN0_MASK 							//PLL available
+    uint32_t divider, multiplier;
+    #ifdef MCG_C5_PLLCLKEN0_MASK                             //PLL available
     if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) {   //PLL/FLL is selected
         if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {         //FLL is selected
-	#endif
+    #endif
             if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) {     //FLL uses external reference
                 divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
                 if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
@@ -74,14 +74,14 @@ static uint32_t extosc_frequency(void) {
 
                 return MCGClock * divider / multiplier;
             }
-	#ifdef MCG_C5_PLLCLKEN0_MASK
+    #ifdef MCG_C5_PLLCLKEN0_MASK
         } else {             //PLL is selected
             divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
             multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u); 
             return MCGClock * divider / multiplier;         
         }
     }
-	#endif
+    #endif
 
     //In all other cases either there is no crystal or we cannot determine it
     //For example when the FLL is running on the internal reference, and there is also an
@@ -95,17 +95,17 @@ static uint32_t mcgpllfll_frequency(void) {
         return 0;
 
     uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
-	#ifdef MCG_C5_PLLCLKEN0_MASK
+    #ifdef MCG_C5_PLLCLKEN0_MASK
     if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {         //FLL is selected
         SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;        //MCG peripheral clock is FLL output
-	#endif
+    #endif
         return MCGClock;
-	#ifdef MCG_C5_PLLCLKEN0_MASK
+    #ifdef MCG_C5_PLLCLKEN0_MASK
     } else {                                            //PLL is selected
         SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;         //MCG peripheral clock is PLL output
         return (MCGClock >> 1);
     }
-	#endif
+    #endif
 
     //It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active 
     //for the peripherals, this is however an unlikely setup

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/rtc_api.c

@@ -20,7 +20,7 @@ static void init(void) {
     // enable RTC clock
     SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
 
-	pinmap_pinout(PinMap_RTC[0].pin, PinMap_RTC);		//Map RTC clk input (if not NC)
+    pinmap_pinout(PinMap_RTC[0].pin, PinMap_RTC);        //Map RTC clk input (if not NC)
 
     // select RTC clock source
     SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
@@ -32,12 +32,12 @@ void rtc_init(void) {
 
     //Configure the TSR. default value: 1
     RTC->TSR = 1;
-	
-	if (PinMap_RTC[0].pin == NC) {		//Use OSC32K
-		RTC->CR |= RTC_CR_OSCE_MASK;
-		//delay for OSCE stabilization
-		for(int i=0; i<0x1000; i++) __NOP();
-	}
+    
+    if (PinMap_RTC[0].pin == NC) {        //Use OSC32K
+        RTC->CR |= RTC_CR_OSCE_MASK;
+        //delay for OSCE stabilization
+        for(int i=0; i<0x1000; i++) __NOP();
+    }
 
     // enable counter
     RTC->SR |= RTC_SR_TCE_MASK;
@@ -58,7 +58,7 @@ int rtc_isenabled(void) {
     // call init() if the rtc is enabled
 
     // if RTC not enabled return 0
-	SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
+    SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
     SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
     if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
         return 0;

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/serial_api.c

@@ -28,22 +28,22 @@
 
 //Devices either user UART0 or UARTLP
 #ifndef UARTLP_BASES
-	#define UARTLP_C2_RE_MASK		UART0_C2_RE_MASK
-	#define UARTLP_C2_TE_MASK		UART0_C2_TE_MASK
-	#define UARTLP_BDH_SBNS_MASK	UART0_BDH_SBNS_MASK
-	#define	UARTLP_BDH_SBNS_SHIFT	UART0_BDH_SBNS_SHIFT
-	#define UARTLP_S1_TDRE_MASK		UART0_S1_TDRE_MASK
-	#define UARTLP_S1_OR_MASK		UART0_S1_OR_MASK
-	#define UARTLP_C2_RIE_MASK		UART0_C2_RIE_MASK
-	#define UARTLP_C2_TIE_MASK		UART0_C2_TIE_MASK
-	#define UARTLP_C2_SBK_MASK		UART0_C2_SBK_MASK
-	#define UARTLP_S1_RDRF_MASK		UART0_S1_RDRF_MASK
+    #define UARTLP_C2_RE_MASK        UART0_C2_RE_MASK
+    #define UARTLP_C2_TE_MASK        UART0_C2_TE_MASK
+    #define UARTLP_BDH_SBNS_MASK    UART0_BDH_SBNS_MASK
+    #define    UARTLP_BDH_SBNS_SHIFT    UART0_BDH_SBNS_SHIFT
+    #define UARTLP_S1_TDRE_MASK        UART0_S1_TDRE_MASK
+    #define UARTLP_S1_OR_MASK        UART0_S1_OR_MASK
+    #define UARTLP_C2_RIE_MASK        UART0_C2_RIE_MASK
+    #define UARTLP_C2_TIE_MASK        UART0_C2_TIE_MASK
+    #define UARTLP_C2_SBK_MASK        UART0_C2_SBK_MASK
+    #define UARTLP_S1_RDRF_MASK        UART0_S1_RDRF_MASK
 #endif
 
 #ifdef UART2
-	#define UART_NUM		3
+    #define UART_NUM        3
 #else
-	#define UART_NUM		1
+    #define UART_NUM        1
 #endif
 
 /******************************************************************************
@@ -73,20 +73,20 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
                      else
                         SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
                      SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
-	#if UART_NUM > 1
+    #if UART_NUM > 1
         case UART_1: SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
         case UART_2: SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
-	#endif
+    #endif
     }
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
 
     switch (uart) {
         case UART_0: obj->index = 0; break;
-	#if UART_NUM > 1
+    #if UART_NUM > 1
         case UART_1: obj->index = 1; break;
         case UART_2: obj->index = 2; break;
-	#endif
+    #endif
     }
 
     // set default baud rate and format
@@ -157,7 +157,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
     // Disable UART before changing registers
     obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
 
-	// TODO: Support other number of data bits (also in the write method!)
+    // TODO: Support other number of data bits (also in the write method!)
     if ((data_bits < 8) || (data_bits > 8)) {
         error("Invalid number of bits (%d) in serial format, should be 8\r\n", data_bits);
     }
@@ -223,10 +223,10 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
     uint32_t vector = 0;
     switch ((int)obj->uart) {
         case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
-		#if UART_NUM > 1
+        #if UART_NUM > 1
         case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
         case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
-		#endif
+        #endif
     }
 
     if (enable) {

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/sleep.c

@@ -44,10 +44,10 @@ void deepsleep(void)
     //Switch back to PLL as clock source if needed
     //The interrupt that woke up the device will run at reduced speed
     if (PLL_FLL_en) {
-		#ifdef MCG_C5_PLLCLKEN0_MASK		//PLL available
+        #ifdef MCG_C5_PLLCLKEN0_MASK        //PLL available
         if (MCG->C6 & (1<<MCG_C6_PLLS_SHIFT) != 0) /* If PLL */
             while((MCG->S & MCG_S_LOCK0_MASK) == 0x00U); /* Wait until locked */
-		#endif
+        #endif
         MCG->C1 &= ~MCG_C1_CLKS_MASK;
     }