Skip to content

Commit 6bba46e

Browse files
Matthew MacovskyKyle Kearney
authored andcommitted
Differentiate alt and dummy cycles in QSPIF
Propagate separate alt cycle and dummy cycle counts from QSPIFBlockDevice down to the qspi driver, so that drivers which handle the two separately have enough information to do so.
1 parent 9b32c0f commit 6bba46e

File tree

2 files changed

+29
-21
lines changed

2 files changed

+29
-21
lines changed

components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.cpp

Lines changed: 25 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ using namespace mbed;
3636
#define UINT64_MAX -1
3737
#endif
3838
#define QSPI_NO_ADDRESS_COMMAND UINT64_MAX
39+
#define QSPI_ALT_DEFAULT_VALUE 0
3940
// Status Register Bits
4041
#define QSPIF_STATUS_BIT_WIP 0x1 //Write In Progress
4142
#define QSPIF_STATUS_BIT_WEL 0x2 // Write Enable Latch
@@ -168,12 +169,12 @@ int QSPIFBlockDevice::init()
168169
_inst_width = QSPI_CFG_BUS_SINGLE;
169170
_address_width = QSPI_CFG_BUS_SINGLE;
170171
_address_size = QSPI_CFG_ADDR_SIZE_24;
172+
_alt_size = 0;
173+
_dummy_cycles = 0;
171174
_data_width = QSPI_CFG_BUS_SINGLE;
172-
_dummy_and_mode_cycles = 0;
173175
_write_register_inst = QSPIF_WRSR;
174176
_read_register_inst = QSPIF_RDSR;
175177

176-
177178
if (QSPI_STATUS_OK != _qspi_set_frequency(_freq)) {
178179
tr_error("QSPI Set Frequency Failed");
179180
status = QSPIF_BD_ERROR_DEVICE_ERROR;
@@ -302,15 +303,15 @@ int QSPIFBlockDevice::read(void *buffer, bd_addr_t addr, bd_size_t size)
302303
_mutex.lock();
303304

304305
// Configure Bus for Reading
305-
_qspi_configure_format(_inst_width, _address_width, _address_size, QSPI_CFG_BUS_SINGLE,
306-
0, _data_width, _dummy_and_mode_cycles);
306+
_qspi_configure_format(_inst_width, _address_width, _address_size, _address_width, // Alt width == address width
307+
_alt_size, _data_width, _dummy_cycles);
307308

308309
if (QSPI_STATUS_OK != _qspi_send_read_command(_read_instruction, buffer, addr, size)) {
309310
status = QSPIF_BD_ERROR_DEVICE_ERROR;
310311
tr_error("Read Command failed");
311312
}
312313

313-
// All commands other than Read use default 1-1-1 Bus mode (Program/Erase are constrained by flash memory performance less than that of the bus)
314+
// All commands other than Read use default 1-1-1 Bus mode (Program/Erase are constrained by flash memory performance more than bus performance)
314315
_qspi_configure_format(QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_SINGLE, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_BUS_SINGLE,
315316
0, QSPI_CFG_BUS_SINGLE, 0);
316317

@@ -1024,8 +1025,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10241025
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE];
10251026
set_quad_enable = true;
10261027
is_qpi_mode = true;
1027-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] >> 5)
1028-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] & 0x1F);
1028+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] & 0x1F;
1029+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1] >> 5;
1030+
_alt_size = mode_cycles * 4;
10291031
tr_debug("Read Bus Mode set to 4-4-4, Instruction: 0x%xh", _read_instruction);
10301032
//_inst_width = QSPI_CFG_BUS_QUAD;
10311033
_address_width = QSPI_CFG_BUS_QUAD;
@@ -1038,9 +1040,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10381040
// Fast Read 1-4-4 Supported
10391041
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE];
10401042
set_quad_enable = true;
1041-
// dummy cycles + mode cycles = Dummy Cycles
1042-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] >> 5)
1043-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] & 0x1F);
1043+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] & 0x1F;
1044+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1] >> 5;
1045+
_alt_size = mode_cycles * 4;
10441046
_address_width = QSPI_CFG_BUS_QUAD;
10451047
_data_width = QSPI_CFG_BUS_QUAD;
10461048
tr_debug("Read Bus Mode set to 1-4-4, Instruction: 0x%xh", _read_instruction);
@@ -1051,8 +1053,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10511053
// Fast Read 1-1-4 Supported
10521054
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE];
10531055
set_quad_enable = true;
1054-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] >> 5)
1055-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] & 0x1F);
1056+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] & 0x1F;
1057+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1] >> 5;
1058+
_alt_size = mode_cycles;
10561059
_data_width = QSPI_CFG_BUS_QUAD;
10571060
tr_debug("Read Bus Mode set to 1-1-4, Instruction: 0x%xh", _read_instruction);
10581061
break;
@@ -1061,8 +1064,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10611064
if (examined_byte & 0x01) {
10621065
// Fast Read 2-2-2 Supported
10631066
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE];
1064-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] >> 5)
1065-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] & 0x1F);
1067+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] & 0x1F;
1068+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1] >> 5;
1069+
_alt_size = mode_cycles * 2;
10661070
_address_width = QSPI_CFG_BUS_DUAL;
10671071
_data_width = QSPI_CFG_BUS_DUAL;
10681072
tr_debug("Read Bus Mode set to 2-2-2, Instruction: 0x%xh", _read_instruction);
@@ -1073,8 +1077,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10731077
if (examined_byte & 0x10) {
10741078
// Fast Read 1-2-2 Supported
10751079
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE];
1076-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] >> 5)
1077-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] & 0x1F);
1080+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] & 0x1F;
1081+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1] >> 5;
1082+
_alt_size = mode_cycles * 2;
10781083
_address_width = QSPI_CFG_BUS_DUAL;
10791084
_data_width = QSPI_CFG_BUS_DUAL;
10801085
tr_debug("Read Bus Mode set to 1-2-2, Instruction: 0x%xh", _read_instruction);
@@ -1083,8 +1088,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
10831088
if (examined_byte & 0x01) {
10841089
// Fast Read 1-1-2 Supported
10851090
read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE];
1086-
_dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] >> 5)
1087-
+ (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] & 0x1F);
1091+
_dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] & 0x1F;
1092+
uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1] >> 5;
1093+
_alt_size = mode_cycles;
10881094
_data_width = QSPI_CFG_BUS_DUAL;
10891095
tr_debug("Read Bus Mode set to 1-1-2, Instruction: 0x%xh", _read_instruction);
10901096
break;
@@ -1322,7 +1328,7 @@ qspi_status_t QSPIFBlockDevice::_qspi_send_read_command(unsigned int read_inst,
13221328
// Send Read command to device driver
13231329
size_t buf_len = size;
13241330

1325-
if (_qspi.read(read_inst, -1, (unsigned int)addr, (char *)buffer, &buf_len) != QSPI_STATUS_OK) {
1331+
if (_qspi.read(read_inst, (_alt_size == 0) ? -1 : QSPI_ALT_DEFAULT_VALUE, (unsigned int)addr, (char *)buffer, &buf_len) != QSPI_STATUS_OK) {
13261332
tr_error("Read failed");
13271333
return QSPI_STATUS_ERROR;
13281334
}

components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -357,9 +357,11 @@ class QSPIFBlockDevice : public mbed::BlockDevice {
357357
// Bus speed configuration
358358
qspi_bus_width_t _inst_width; //Bus width for Instruction phase
359359
qspi_bus_width_t _address_width; //Bus width for Address phase
360-
qspi_address_size_t _address_size; // number of bytes for address
360+
qspi_address_size_t _address_size; //Number of bits for address
361+
qspi_alt_size_t _alt_size; //Number of bits for alt
362+
bool _alt_enabled; //Whether alt is enabled
363+
uint8_t _dummy_cycles; //Number of Dummy cycles required by Current Bus Mode
361364
qspi_bus_width_t _data_width; //Bus width for Data phase
362-
int _dummy_and_mode_cycles; // Number of Dummy and Mode Bits required by Current Bus Mode
363365

364366
uint32_t _init_ref_count;
365367
bool _is_initialized;

0 commit comments

Comments
 (0)