Merge pull request #3489 from bcostm/fix_issue_3474

NUCLEO_F103RB - Correct CAN and PWM alternate-functions

Author: 0xc0170

targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c

@@ -110,7 +110,7 @@ const PinMap PinMap_PWM[] = {
     {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 1)}, // TIM1_CH3N - Default
 
     {PC_6,  PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 1, 0)}, // TIM3_CH1 - GPIO_FullRemap_TIM3
-    {PC_7,  PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 1, 0)}, // TIM3_CH2 - GPIO_FullRemap_TIM3
+    {PC_7,  PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 2, 0)}, // TIM3_CH2 - GPIO_FullRemap_TIM3
     {PC_8,  PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 3, 0)}, // TIM3_CH3 - GPIO_FullRemap_TIM3
     {PC_9,  PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 9, 4, 0)}, // TIM3_CH4 - GPIO_FullRemap_TIM3
     {NC,    NC,    0}
@@ -182,12 +182,12 @@ const PinMap PinMap_SPI_SSEL[] = {
 
 const PinMap PinMap_CAN_RD[] = {
     {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
-    {PB_8 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 1)},
+    {PB_8 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 10)}, // Remap CAN_RX to PB_8
     {NC,    NC,    0}
 };
 
 const PinMap PinMap_CAN_TD[] = {
-    {PA_12,  CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
-    {PB_9 ,  CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 1)},
+    {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
+    {PB_9 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 10)}, // Remap CAN_TX to PB_9
     {NC,    NC,    0}
 };

targets/TARGET_STM/TARGET_STM32F1/pinmap.c

@@ -130,6 +130,9 @@ void pin_function(PinName pin, int data)
             case 9: // Full Remap TIM3
                 __HAL_AFIO_REMAP_TIM3_ENABLE();
                 break;
+            case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
+                __HAL_AFIO_REMAP_CAN1_2();
+                break;
             default:
                 break;
         }