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M487: Make memory specification configurable
This is to support custom targets based on M480 series chips.
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+288
-73
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7 files changed

+288
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‎targets/TARGET_NUVOTON/TARGET_M480/device/M480_mem.h

Lines changed: 133 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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/*
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* Copyright (c) 2020, Nuvoton Technology Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __M480_MEM_H__
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#define __M480_MEM_H__
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/* About M480_mem.h/M480_mem.icf.h
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*
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* 1. M480_mem.h is created for centralizing memory configuration. It will be included by C/C++ files
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* and linker files (except IAR linker file).
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* 2. IAR linker doesn't support preprocessor, so M480_mem.icf.h, duplicate of M480_mem.h
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* is created for IAR linker file.
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* 3. To continue above, we name M480_mem.icf.h instead of M480_mem.icf because:
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* (1) Mbed OS build tool may mis-regard M480_mem.icf as the main linker configuration file.
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* (2) *.icf files may not be present in search directories for "include" directive. Per observation,
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* the search directories are inconsistent among normal example build and test code build. To address
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* it, we name M480_mem.icf.h instead because *.h files are always present in these builds
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* (already there or via copy).
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*/
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/* Default memory specification
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*
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* Flash size: 512KiB
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* SRAM size: 160KiB = 128KiB + 32KiB (SPIM CCM)
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*/
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/* Resolve ROM start */
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#ifndef MBED_ROM_START
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#define MBED_ROM_START (0x0)
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#endif
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/* Resolve ROM size */
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#ifndef MBED_ROM_SIZE
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#define MBED_ROM_SIZE (0x80000)
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#endif
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/* Resolve RAM start */
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#ifndef MBED_RAM_START
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#define MBED_RAM_START (0x20000000)
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#endif
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/* Resolve RAM size */
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#ifndef MBED_RAM_SIZE
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#define MBED_RAM_SIZE (0x28000)
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#endif
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/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just
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* MBED_APP_xxx macros to linker files even though they mean the same thing.
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* Because this file is to include by both C/C++ files and linker files, we add
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* these macros according to the others for consistency when they are missing
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* in compile or link stage. */
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#ifndef APPLICATION_ADDR
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#ifdef MBED_APP_START
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#define APPLICATION_ADDR MBED_APP_START
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#else
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#define APPLICATION_ADDR MBED_ROM_START
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#endif
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#endif
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#ifndef APPLICATION_SIZE
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#ifdef MBED_APP_SIZE
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#define APPLICATION_SIZE MBED_APP_SIZE
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#else
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#define APPLICATION_SIZE MBED_ROM_SIZE
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#endif
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#endif
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#ifndef APPLICATION_RAM_ADDR
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#ifdef MBED_RAM_APP_START
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#define APPLICATION_RAM_ADDR MBED_RAM_APP_START
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#else
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#define APPLICATION_RAM_ADDR MBED_RAM_START
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#endif
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#endif
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#ifndef APPLICATION_RAM_SIZE
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#ifdef MBED_RAM_APP_SIZE
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#define APPLICATION_RAM_SIZE MBED_RAM_APP_SIZE
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#else
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#define APPLICATION_RAM_SIZE MBED_RAM_SIZE
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#endif
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#endif
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#ifndef MBED_APP_START
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#define MBED_APP_START APPLICATION_ADDR
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#endif
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#ifndef MBED_APP_SIZE
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#define MBED_APP_SIZE APPLICATION_SIZE
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#endif
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#ifndef MBED_RAM_APP_START
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#define MBED_RAM_APP_START APPLICATION_RAM_ADDR
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#endif
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#ifndef MBED_RAM_APP_SIZE
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#define MBED_RAM_APP_SIZE APPLICATION_RAM_SIZE
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#endif
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#if (APPLICATION_ADDR != MBED_APP_START)
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#error("APPLICATION_ADDR and MBED_APP_START are not the same!!!")
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#endif
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#if (APPLICATION_SIZE != MBED_APP_SIZE)
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#error("APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!")
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#endif
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#if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START)
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#error("APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!")
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#endif
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#if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE)
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#error("APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!")
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#endif
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133+
#endif /* __M480_MEM_H__ */

‎targets/TARGET_NUVOTON/TARGET_M480/device/M480_mem.icf.h

Lines changed: 115 additions & 0 deletions
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1+
/*
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* Copyright (c) 2020, Nuvoton Technology Corporation
3+
*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
8+
* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
11+
*
12+
* Unless required by applicable law or agreed to in writing, software
13+
* distributed under the License is distributed on an "AS IS" BASIS,
14+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15+
* See the License for the specific language governing permissions and
16+
* limitations under the License.
17+
*/
18+
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/* See M480_mem.h for documentation */
20+
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/* Default memory specification
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*
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* Flash size: 512KiB
24+
* SRAM size: 160KiB = 128KiB + 32KiB (SPIM CCM)
25+
*/
26+
27+
/* Resolve ROM start */
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if (!isdefinedsymbol(MBED_ROM_START)) {
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define symbol MBED_ROM_START = 0x0;
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}
31+
32+
/* Resolve ROM size */
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if (!isdefinedsymbol(MBED_ROM_SIZE)) {
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define symbol MBED_ROM_SIZE = 0x80000;
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}
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/* Resolve RAM start */
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if (!isdefinedsymbol(MBED_RAM_START)) {
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define symbol MBED_RAM_START = 0x20000000;
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}
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/* Resolve RAM size */
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if (!isdefinedsymbol(MBED_RAM_SIZE)) {
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define symbol MBED_RAM_SIZE = 0x28000;
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}
46+
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/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just
48+
* MBED_APP_xxx macros to linker files even though they mean the same thing.
49+
* Because this file is to include by both C/C++ files and linker files, we add
50+
* these macros according to the others for consistency when they are missing
51+
* in compile or link stage. */
52+
53+
if (!isdefinedsymbol(APPLICATION_ADDR)) {
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if (isdefinedsymbol(MBED_APP_START)) {
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define symbol APPLICATION_ADDR = MBED_APP_START;
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} else {
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define symbol APPLICATION_ADDR = MBED_ROM_START;
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}
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}
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if (!isdefinedsymbol(APPLICATION_SIZE)) {
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if (isdefinedsymbol(MBED_APP_SIZE)) {
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define symbol APPLICATION_SIZE = MBED_APP_SIZE;
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} else {
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define symbol APPLICATION_SIZE = MBED_ROM_SIZE;
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}
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}
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if (!isdefinedsymbol(APPLICATION_RAM_ADDR)) {
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if (isdefinedsymbol(MBED_RAM_APP_START)) {
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define symbol APPLICATION_RAM_ADDR = MBED_RAM_APP_START;
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} else {
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define symbol APPLICATION_RAM_ADDR = MBED_RAM_START;
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}
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}
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if (!isdefinedsymbol(APPLICATION_RAM_SIZE)) {
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if (isdefinedsymbol(MBED_RAM_APP_SIZE)) {
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define symbol APPLICATION_RAM_SIZE = MBED_RAM_APP_SIZE;
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} else {
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define symbol APPLICATION_RAM_SIZE = MBED_RAM_SIZE;
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}
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}
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if (!isdefinedsymbol(MBED_APP_START)) {
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define symbol MBED_APP_START = APPLICATION_ADDR;
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}
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if (!isdefinedsymbol(MBED_APP_SIZE)) {
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define symbol MBED_APP_SIZE = APPLICATION_SIZE;
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}
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if (!isdefinedsymbol(MBED_RAM_APP_START)) {
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define symbol MBED_RAM_APP_START = APPLICATION_RAM_ADDR;
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}
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if (!isdefinedsymbol(MBED_RAM_APP_SIZE)) {
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define symbol MBED_RAM_APP_SIZE = APPLICATION_RAM_SIZE;
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}
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if (APPLICATION_ADDR != MBED_APP_START) {
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error "APPLICATION_ADDR and MBED_APP_START are not the same!!!";
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}
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if (APPLICATION_SIZE != MBED_APP_SIZE) {
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error "APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!";
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}
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if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START) {
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error "APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!";
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}
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if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE) {
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error "APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!";
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}

‎targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct

Lines changed: 11 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1,60 +1,41 @@
11
#! armcc -E
22

3-
; 512 KB APROM
4-
#if !defined(MBED_APP_START)
5-
#define MBED_APP_START 0x00000000
6-
#endif
7-
8-
#if !defined(MBED_APP_SIZE)
9-
#define MBED_APP_SIZE 0x00080000
10-
#endif
11-
12-
; 160 KB SRAM
13-
#if !defined(MBED_RAM_START)
14-
#define MBED_RAM_START 0x20000000
15-
#endif
16-
17-
#if !defined(MBED_RAM_SIZE)
18-
#define MBED_RAM_SIZE 0x00028000
19-
#endif
20-
21-
22-
#define SPIM_CCM_START 0x20020000
23-
#define SPIM_CCM_END 0x20028000
3+
#include "../M480_mem.h"
244

255
#if !defined(MBED_BOOT_STACK_SIZE)
266
#define MBED_BOOT_STACK_SIZE 0x400
277
#endif
288

299
#define VECTOR_SIZE (4*(16 + 96))
3010

31-
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
32-
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
11+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
12+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3313
*(RESET, +First)
3414
*(InRoot$$Sections)
3515
.ANY (+RO)
3616
}
3717

38-
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
18+
ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE {
3919
}
4020

4121
/* VTOR[TBLOFF] alignment requires:
4222
*
4323
* 1. Minumum 32-word
4424
* 2. Rounding up to the next power of two of table size
4525
*/
46-
ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors
26+
ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors
4727
}
4828

49-
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
29+
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
5030
}
5131

52-
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
32+
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
5333
.ANY (+RW +ZI)
5434
}
5535

56-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
36+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
5737
}
5838
}
59-
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM
60-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 160 KB SRAM
39+
40+
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
41+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE))

‎targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct

Lines changed: 15 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -1,49 +1,41 @@
11
#! armcc -E
22

3-
#if !defined(MBED_APP_START)
4-
#define MBED_APP_START 0x00000000
5-
#endif
6-
7-
#if !defined(MBED_APP_SIZE)
8-
#define MBED_APP_SIZE 0x00080000
9-
#endif
3+
#include "../M480_mem.h"
104

115
#if !defined(MBED_BOOT_STACK_SIZE)
126
#define MBED_BOOT_STACK_SIZE 0x400
137
#endif
148

9+
#define VECTOR_SIZE (4*(16 + 96))
1510

16-
#define SPIM_CCM_START 0x20020000
17-
#define SPIM_CCM_END 0x20028000
18-
19-
20-
LR_IROM1 MBED_APP_START {
21-
ER_IROM1 MBED_APP_START { ; load address = execution address
11+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
12+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
2213
*(RESET, +First)
2314
*(InRoot$$Sections)
2415
.ANY (+RO)
2516
}
2617

27-
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
18+
ARM_LIB_STACK MBED_RAM_APP_START EMPTY MBED_BOOT_STACK_SIZE {
2819
}
2920

3021
/* VTOR[TBLOFF] alignment requires:
3122
*
3223
* 1. Minumum 32-word
3324
* 2. Rounding up to the next power of two of table size
3425
*/
35-
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 96)) { ; Reserve for vectors
26+
ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors
3627
}
37-
38-
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
28+
29+
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
3930
}
40-
41-
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
31+
32+
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
4233
.ANY (+RW +ZI)
4334
}
44-
45-
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x28000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
35+
36+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
4637
}
4738
}
48-
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM
49-
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20028000) ; 160 KB SRAM
39+
40+
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
41+
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_APP_START + MBED_RAM_APP_SIZE))

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