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BL STM32746xG: Update scatter/link files
1 parent 47a128a commit 728e89d

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4 files changed

+38
-8
lines changed

4 files changed

+38
-8
lines changed

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x100000
37+
#endif
38+
3039
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2016, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x100000
37+
#endif
38+
3039
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,16 @@
11
/* Linker script to configure memory regions. */
2+
3+
#if !defined(MBED_APP_START)
4+
#define MBED_APP_START 0x08000000
5+
#endif
6+
7+
#if !defined(MBED_APP_SIZE)
8+
#define MBED_APP_SIZE 1024K
9+
#endif
10+
211
MEMORY
312
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
13+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
514
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 320K - 0x1C8
615
}
716

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,10 @@
1+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
3+
14
/* [ROM = 1024kb = 0x100000] */
2-
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
4-
define symbol __region_ROM_end__ = 0x080FFFFF;
5+
define symbol __intvec_start__ = MBED_APP_START;
6+
define symbol __region_ROM_start__ = MBED_APP_START;
7+
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
58

69
/* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */
710
define symbol __NVIC_start__ = 0x20000000;

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