Merge pull request #13079 from artokin/nanostack_release_12_3_0

[feature-wisun] Nanostack release v12.3.0

Author: 0xc0170

components/802.15.4_RF/atmel-rf-driver/atmel-rf-driver/NanostackRfPhyAtmel.h

@@ -70,9 +70,16 @@
 #if !defined(TEST_PIN_SPARE_2)
 #define TEST_PIN_SPARE_2    D8
 #endif
+#if !defined(SE2435L_CSD)
+#define SE2435L_CSD    D2
+#endif
+#if !defined(SE2435L_ANT_SEL)
+#define SE2435L_ANT_SEL    D8
+#endif
 
 class RFBits;
 class TestPins;
+class Se2435Pins;
 
 class NanostackRfPhyAtmel : public NanostackRfPhy {
 public:
@@ -86,10 +93,13 @@ class NanostackRfPhyAtmel : public NanostackRfPhy {
     virtual void set_mac_address(uint8_t *mac);
 
 private:
+#if !defined(DISABLE_AT24MAC)
     AT24Mac _mac;
+#endif
     uint8_t _mac_addr[8];
     RFBits *_rf;
     TestPins *_test_pins;
+    Se2435Pins *_se2435_pa_pins;
     bool _mac_set;
 
     const PinName _spi_mosi;

components/802.15.4_RF/atmel-rf-driver/source/AT86RF215Reg.h

@@ -26,6 +26,7 @@ extern "C" {
 #define RF24_IRQS                   0x01
 #define BBC0_IRQS                   0x02
 #define BBC1_IRQS                   0x03
+#define RF_AUXS                     0x01
 #define RF_CFG                      0x06
 #define RF_IQIFC1                   0x0B
 #define RF_PN                       0x0D
@@ -47,6 +48,8 @@ extern "C" {
 #define RF_EDV                      0x10
 #define RF_TXCUTC                   0x12
 #define RF_TXDFE                    0x13
+#define RF_PAC                      0x14
+#define RF_PADFE                    0x16
 #define BBC_IRQM                    0x00
 #define BBC_PC                      0x01
 #define BBC_RXFLL                   0x04
@@ -85,6 +88,20 @@ extern "C" {
 #define BBC1_FBRXS                  0x3000
 #define BBC1_FBTXS                  0x3800
 
+// RF_AUXS
+#define EXTLNABYP                   (1 << 7)
+#define AGCMAP                      0x60
+#define AGCMAP_2                    (2 << 5)
+#define AVEN                        (1 << 3)
+
+// RF_PAC
+#define TXPWR                       0x1F
+#define TXPWR_11                    (11 << 0)
+
+// RF_PADFE
+#define PADFE                       0xC0
+#define RF_FEMODE3                  (3 << 6)
+
 // RF_AGCC
 #define AGCI                        (1 << 6)
 #define AVGS                        0x30
@@ -95,7 +112,6 @@ extern "C" {
 #define TGT_1                       (1 << 5)
 #define TGT_3                       (3 << 5)
 
-
 // RF_RXBWC
 #define BW                          0x0F
 #define RF_BW2000KHZ_IF2000KHZ      (11 << 0)

components/802.15.4_RF/atmel-rf-driver/source/AT86RFReg.h

@@ -48,6 +48,7 @@ extern "C" {
 #define PART_AT86RF212              0x07
 #define PART_AT86RF233              0x0B
 #define PART_AT86RF215              0x34
+#define PART_AT86RF215M             0x36
 #define VERSION_AT86RF212           0x01
 #define VERSION_AT86RF212B          0x03
 

components/802.15.4_RF/atmel-rf-driver/source/NanostackRfPhyAT86RF215.cpp

@@ -23,6 +23,7 @@
 #include "platform/mbed_wait_api.h"
 #include "nanostack/platform/arm_hal_phy.h"
 #include "NanostackRfPhyAtmel.h"
+#include "AT86RFReg.h"
 #include "AT86RF215Reg.h"
 #include "mbed_trace.h"
 #include "common_functions.h"
@@ -165,6 +166,7 @@ using namespace rtos;
 #include "rfbits.h"
 static RFBits *rf;
 static TestPins *test_pins;
+static Se2435Pins *se2435_pa_pins = NULL;
 
 #define MAC_FRAME_TYPE_MASK     0x07
 #define MAC_TYPE_ACK            (2)
@@ -464,6 +466,18 @@ static void rf_init_registers(rf_modules_e module)
             rf_write_rf_register_field(RF_AGCS, module, TGT, TGT_3);
         }
     }
+    if (se2435_pa_pins) {
+        // Wakeup SE2435L
+        se2435_pa_pins->CSD = 1;
+        // Antenna port selection: (0 - port 1, 1 - port 2)
+        se2435_pa_pins->ANT_SEL = 0;
+        // Enable external front end with configuration 3
+        rf_write_rf_register_field(RF_PADFE, module, PADFE, RF_FEMODE3);
+        // Output power at 900MHz: 0 dBm with FSK/QPSK, less than -5 dBm with OFDM
+        rf_write_rf_register_field(RF_PAC, module, TXPWR, TXPWR_11);
+    }
+    // Enable analog voltage regulator
+    rf_write_rf_register_field(RF_AUXS, module, AVEN, AVEN);
     // Disable filtering FCS
     rf_write_bbc_register_field(BBC_PC, module, FCSFE, 0);
     // Set channel spacing
@@ -1189,10 +1203,28 @@ int RFBits::init_215_driver(RFBits *_rf, TestPins *_test_pins, const uint8_t mac
     test_pins = _test_pins;
     irq_thread_215.start(mbed::callback(this, &RFBits::rf_irq_task));
     rf->spi.frequency(25000000);
+    /* Atmel AT86RF215 Device Family datasheet:
+     * Errata #9: RF215M device has a wrong part number
+     * Description:
+     * The RF215M device part number is 0x34 instead of 0x36 (register RF_PN.PN).
+     */
+#if !defined(HAVE_AT86RF215M)
     *rf_part_num = rf_read_common_register(RF_PN);
+#else
+    *rf_part_num = PART_AT86RF215M;
+    // AT86RF215M is Sub-GHz only transceiver. Change default settings.
+    rf_module = RF_09;
+    mac_mode = IEEE_802_15_4G_2012;
+#endif
     rf_version_num = rf_read_common_register(RF_VN);
     tr_info("RF version number: %x", rf_version_num);
     return rf_device_register(mac);
 }
 
+int RFBits::init_se2435_pa(Se2435Pins *_se2435_pa_pins)
+{
+    se2435_pa_pins = _se2435_pa_pins;
+    return 0;
+}
+
 #endif // MBED_CONF_NANOSTACK_CONFIGURATION && DEVICE_SPI && DEVICE_INTERRUPTIN && defined(MBED_CONF_RTOS_PRESENT)

components/802.15.4_RF/atmel-rf-driver/source/NanostackRfPhyAtmel.cpp

@@ -275,8 +275,15 @@ TestPins::TestPins(PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, P
 {
 }
 
+Se2435Pins::Se2435Pins(PinName csd_pin, PinName ant_sel_pin)
+    :   CSD(csd_pin),
+        ANT_SEL(ant_sel_pin)
+{
+}
+
 static RFBits *rf;
 static TestPins *test_pins;
+static Se2435Pins *se2435_pa_pins;
 static uint8_t rf_part_num = 0;
 /*TODO: RSSI Base value setting*/
 static int8_t rf_rssi_base_val = -91;
@@ -2168,14 +2175,21 @@ static uint8_t rf_scale_lqi(int8_t rssi)
 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
                                          PinName spi_sclk, PinName spi_cs,  PinName spi_rst, PinName spi_slp, PinName spi_irq,
                                          PinName i2c_sda, PinName i2c_scl)
-    : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _test_pins(NULL), _mac_set(false),
-      _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
-      _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
+    :
+#if !defined(DISABLE_AT24MAC)
+    _mac(i2c_sda, i2c_scl),
+#endif
+    _mac_addr(), _rf(NULL), _test_pins(NULL), _se2435_pa_pins(NULL), _mac_set(false),
+    _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
+    _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
 {
     _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
 #ifdef TEST_GPIOS_ENABLED
     _test_pins = new TestPins(TEST_PIN_TX, TEST_PIN_RX, TEST_PIN_CSMA, TEST_PIN_SPARE_1, TEST_PIN_SPARE_2);
 #endif
+#ifdef SE2435L_PA
+    _se2435_pa_pins = new Se2435Pins(SE2435L_CSD, SE2435L_ANT_SEL);
+#endif
 }
 
 NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
@@ -2200,19 +2214,29 @@ int8_t NanostackRfPhyAtmel::rf_register()
     // Read the mac address if it hasn't been set by a user
     rf = _rf;
     test_pins = _test_pins;
+    se2435_pa_pins = _se2435_pa_pins;
     if (!_mac_set) {
+// Unless AT24MAC is available, using randomly generated MAC address
+#if !defined(DISABLE_AT24MAC)
         int ret = _mac.read_eui64((void *)_mac_addr);
         if (ret < 0) {
             rf = NULL;
             rf_if_unlock();
             return -1;
         }
+#else
+        randLIB_seed_random();
+        randLIB_get_n_bytes_random(_mac_addr, 8);
+        _mac_addr[0] |= 2; //Set Local Bit
+        _mac_addr[0] &= ~1; //Clear multicast bit
+#endif
     }
     /*Reset RF module*/
     rf_if_reset_radio();
     rf_part_num = rf_if_read_part_num();
     int8_t radio_id = -1;
     if (rf_part_num != PART_AT86RF231 && rf_part_num != PART_AT86RF233 && rf_part_num != PART_AT86RF212) {
+        rf->init_se2435_pa(_se2435_pa_pins);
         // Register RF type 215. Jumps to AT86RF215 driver.
         radio_id = rf->init_215_driver(_rf, _test_pins, _mac_addr, &rf_part_num);
     } else {

components/802.15.4_RF/atmel-rf-driver/source/rfbits.h

@@ -51,6 +51,7 @@ class RFBits {
     Timeout cca_timer;
     Timer tx_timer;
     int init_215_driver(RFBits *_rf, TestPins *_test_pins, const uint8_t mac[8], uint8_t *rf_part_num);
+    int init_se2435_pa(Se2435Pins *_se2435_pa_pins);
 #ifdef MBED_CONF_RTOS_PRESENT
     Thread irq_thread;
     Thread irq_thread_215;
@@ -70,4 +71,11 @@ class TestPins {
     DigitalOut TEST5;
 };
 
+class Se2435Pins {
+public:
+    Se2435Pins(PinName csd_pin, PinName ant_sel_pin);
+    DigitalOut CSD;
+    DigitalOut ANT_SEL;
+};
+
 #endif /* RFBITS_H_ */

components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json

@@ -1,17 +1,73 @@
 {
     "name": "s2lp",
     "config": {
+        "SPI_SDI": {
+            "help": "SPI_SDI pin for SPI connection. D11 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_SDO": {
+            "help": "SPI_SDO pin for SPI connection. D12 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_SCLK": {
+            "help": "SPI_SCLK pin for SPI connection, D13 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_CS": {
+            "help": "SPI_CS pin for SPI connection, A1 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_SDN": {
+            "help": "SPI_SDN pin for SPI connection, D7 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "TEST_PIN_TX": {
+            "help": "TEST_PIN_TX pin for serial connection, D6 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "TEST_PIN_RX": {
+            "help": "TEST_PIN_RX pin for serial connection, D5 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "TEST_PIN_CSMA": {
+            "help": "TEST_PIN_CSMA pin for CSMA, D4 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "TEST_PIN_SPARE_1": {
+            "help": "TEST_PIN_SPARE_1 pin for testing, D2 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "TEST_PIN_SPARE_2": {
+            "help": "TEST_PIN_SPARE_2 pin for testing, D8 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_GPIO0": {
+            "help": "SPI_GPIO0 pin for GPIO testing, A0 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_GPIO1": {
+            "help": "SPI_GPIO1 pin for GPIO testing, A2 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_GPIO2": {
+            "help": "SPI_GPIO2 pin for GPIO testing, A3 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "SPI_GPIO3": {
+            "help": "SPI_GPIO3 pin for GPIO testing, A5 assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "I2C_SDA": {
+            "help": "I2C_SDA pin for I2C SDA, null assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
+        "I2C_SCL": {
+            "help": "I2C_SCL pin for I2C SCL, null assumed, needs to be set/overwritten otherwise",
+            "value": null
+        },
         "provide-default": {
             "help": "Provide default NanostackRfpy. [true/false]",
             "value": false
-        },
-        "target_overrides": {
-            "MTB_STM_S2LP": {
-               "s2lp.provide-default": true
-            },
-            "MTB_STM_S2LP_CT": {
-               "s2lp.provide-default": true
-            }
         }
     }
 }