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Merge pull request #14872 from hallard/STM32WLEx
Add STM32WLE5 for custom targets LORA_E5 and RAK3172
2 parents f937383 + c8fdc0a commit 7350b03

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7 files changed

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lines changed

7 files changed

+179
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‎targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt

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@@ -16,6 +16,7 @@ target_sources(mbed-stm32wl
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pwmout_device.c
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serial_device.c
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spi_api.c
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system_clock.c
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)
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target_include_directories(mbed-stm32wl

‎targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h renamed to ‎targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h

File renamed without changes.

‎targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt

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@@ -6,7 +6,6 @@ add_library(mbed-nucleo-wl55jc INTERFACE)
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target_sources(mbed-nucleo-wl55jc
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INTERFACE
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PeripheralPins.c
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system_clock.c
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)
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target_include_directories(mbed-nucleo-wl55jc

‎targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt

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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
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set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32wle5xx.S)
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set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32wle5xc.ld)
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elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
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set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32wle5xx.S)
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set(LINKER_FILE TOOLCHAIN_ARM/stm32wle5xc.sct)
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endif()
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add_library(mbed-stm32wle5xc INTERFACE)
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target_sources(mbed-stm32wle5xc
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INTERFACE
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${STARTUP_FILE}
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)
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target_include_directories(mbed-stm32wle5xc
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INTERFACE
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.
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)
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mbed_set_linker_script(mbed-stm32wle5xc ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
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target_link_libraries(mbed-stm32wle5xc INTERFACE mbed-stm32wl)

‎targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c renamed to ‎targets/TARGET_STM/TARGET_STM32WL/system_clock.c

File renamed without changes.

‎targets/targets.json

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@@ -4381,6 +4381,22 @@
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],
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"device_name": "STM32WL55JCIx"
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},
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"MCU_STM32WLE5xC": {
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"inherits": [
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"MCU_STM32WL"
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],
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"public": false,
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"macros_add": [
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"STM32WLE5xx"
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],
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"extra_labels_add": [
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"STM32WLE5xC"
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],
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"mbed_rom_start": "0x8000000",
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"mbed_rom_size": "0x40000",
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"mbed_ram_start": "0x20000000",
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"mbed_ram_size": "0x10000"
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},
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"MIMXRT1050_EVK": {
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"supported_form_factors": [
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"ARDUINO_UNO"

‎tools/arm_pack_manager/index.json

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@@ -480222,6 +480222,142 @@
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]
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],
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"sub_family": "STM32WL55"
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},
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"STM32WLE5JCIx": {
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"name": "STM32WLE5JCIx:CM4",
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"memories": {
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"IRAM1": {
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"access": {
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"read": true,
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"write": true,
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"execute": false,
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"peripheral": false,
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"secure": false,
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"non_secure": false,
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"non_secure_callable": false
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},
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"start": 536870912,
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"size": 65536,
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"startup": false,
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"default": true
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},
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"IROM1": {
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"access": {
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"read": true,
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"write": false,
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"execute": true,
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"peripheral": false,
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"secure": false,
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"non_secure": false,
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"non_secure_callable": false
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},
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"start": 134217728,
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"size": 262144,
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"startup": true,
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"default": true
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}
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},
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"algorithms": [
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{
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"file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
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"start": 134217728,
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"size": 262144,
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"default": true,
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"ram_start": null,
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"ram_size": null
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}
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],
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"processor": {
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"Symmetric": {
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"units": 1,
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"core": "CortexM4",
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"fpu": "None",
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"mpu": "Present"
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}
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},
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"from_pack": {
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"vendor": "Keil",
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"pack": "STM32WLxx_DFP",
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"version": "1.1.0",
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"url": "http://www.keil.com/pack"
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},
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"vendor": "STMicroelectronics:13",
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"family": "STM32WL Series",
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"sectors": [
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[
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134217728,
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2048
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]
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],
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"sub_family": "STM32WLE5"
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},
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"STM32WLE5CCUx": {
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"name": "STM32WLE5CCUx:CM4",
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"memories": {
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"IRAM1": {
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"access": {
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"read": true,
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"write": true,
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"execute": false,
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"peripheral": false,
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"secure": false,
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"non_secure": false,
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"non_secure_callable": false
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},
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"start": 536870912,
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"size": 65536,
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"startup": false,
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"default": true
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},
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"IROM1": {
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"access": {
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"read": true,
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"write": false,
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"execute": true,
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"peripheral": false,
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"secure": false,
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"non_secure": false,
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"non_secure_callable": false
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},
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"start": 134217728,
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"size": 262144,
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"startup": true,
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"default": true
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}
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},
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"algorithms": [
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{
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"file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
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"start": 134217728,
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"size": 262144,
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"default": true,
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"ram_start": null,
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"ram_size": null
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}
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],
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"processor": {
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"Symmetric": {
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"units": 1,
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"core": "CortexM4",
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"fpu": "None",
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"mpu": "Present"
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}
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},
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"from_pack": {
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"vendor": "Keil",
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"pack": "STM32WLxx_DFP",
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"version": "1.1.0",
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"url": "http://www.keil.com/pack"
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},
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"vendor": "STMicroelectronics:13",
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"family": "STM32WL Series",
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"sectors": [
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[
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134217728,
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2048
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]
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],
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"sub_family": "STM32WLE5"
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},
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"STM32WB15CCUx": {
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"name": "STM32WB15CCUx",

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