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23 | 23 | #include "cmsis.h"
|
24 | 24 | #include "pinmap.h"
|
25 | 25 | #include "error.h"
|
26 |
| - |
27 |
| -// static const PinMap PinMap_UART_TX[] = { |
28 |
| -// {NC , NC , 0} |
29 |
| -// }; |
30 |
| - |
31 |
| -// static const PinMap PinMap_UART_RX[] = { |
32 |
| - |
33 |
| -// {NC , NC , 0} |
34 |
| -// }; |
35 |
| - |
36 |
| -// #define UART_NUM 3 |
37 |
| - |
38 |
| -// static uint32_t serial_irq_ids[UART_NUM] = {0}; |
39 |
| -// static uart_irq_handler irq_handler; |
40 |
| - |
41 |
| -// int stdio_uart_inited = 0; |
42 |
| -// serial_t stdio_uart; |
43 |
| - |
44 |
| -// void serial_init(serial_t *obj, PinName tx, PinName rx) { |
45 |
| -// } |
46 |
| - |
47 |
| -// void serial_free(serial_t *obj) { |
48 |
| - |
49 |
| -// } |
50 |
| - |
51 |
| -// void serial_baud(serial_t *obj, int baudrate) { |
52 |
| - |
53 |
| -// } |
54 |
| - |
55 |
| -// void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
56 |
| - |
57 |
| -// } |
58 |
| - |
59 |
| -// ***************************************************************************** |
60 |
| -// * INTERRUPTS HANDLING |
61 |
| -// ***************************************************************************** |
62 |
| -// static inline void uart_irq(uint8_t status, uint32_t index) { |
63 |
| -// } |
64 |
| - |
65 |
| -// void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
66 |
| -// } |
67 |
| - |
68 |
| -// void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
69 |
| - |
70 |
| -// } |
71 |
| - |
72 |
| -// int serial_getc(serial_t *obj) { |
73 |
| -// return 1; |
74 |
| -// } |
75 |
| - |
76 |
| -// void serial_putc(serial_t *obj, int c) { |
77 |
| -// } |
78 |
| - |
79 |
| -// int serial_readable(serial_t *obj) { |
80 |
| -// return 1; |
81 |
| -// } |
82 |
| - |
83 |
| -// int serial_writable(serial_t *obj) { |
84 |
| -// return 1; |
85 |
| -// } |
86 |
| - |
87 |
| -// void serial_clear(serial_t *obj) { |
88 |
| -// } |
89 |
| - |
90 |
| -// void serial_pinout_tx(PinName tx) { |
91 |
| - |
92 |
| -// } |
93 |
| - |
94 |
| -// void serial_break_set(serial_t *obj) { |
95 |
| - |
96 |
| -// } |
97 |
| - |
98 |
| -// void serial_break_clear(serial_t *obj) { |
99 |
| - |
100 |
| -// } |
| 26 | +#include "fsl_uart_hal.h" |
| 27 | +#include "fsl_clock_manager.h" |
| 28 | +#include "fsl_uart_features.h" |
| 29 | + |
| 30 | +/* TODO: |
| 31 | + putchar/getchar 9 and 10 bits support |
| 32 | + 5 UARTS implementation |
| 33 | +*/ |
| 34 | + |
| 35 | +static const PinMap PinMap_UART_TX[] = { |
| 36 | + {PTB17, UART_0, 3}, |
| 37 | + {NC , NC , 0} |
| 38 | +}; |
| 39 | + |
| 40 | +static const PinMap PinMap_UART_RX[] = { |
| 41 | + {PTB16, UART_0, 3}, |
| 42 | + {NC , NC , 0} |
| 43 | +}; |
| 44 | + |
| 45 | +#define UART_NUM 3 |
| 46 | + |
| 47 | +static uint32_t serial_irq_ids[UART_NUM] = {0}; |
| 48 | +static uart_irq_handler irq_handler; |
| 49 | + |
| 50 | +int stdio_uart_inited = 0; |
| 51 | +serial_t stdio_uart; |
| 52 | + |
| 53 | +static uint32_t serial_get_clock(uint32_t uart_instance) |
| 54 | +{ |
| 55 | + uint32_t uartSourceClock; |
| 56 | + |
| 57 | + if ((uart_instance == 0) || (uart_instance == 1)) { |
| 58 | + clock_manager_get_frequency(kSystemClock, &uartSourceClock); |
| 59 | + } else { |
| 60 | + clock_manager_get_frequency(kBusClock, &uartSourceClock); |
| 61 | + } |
| 62 | + return uartSourceClock; |
| 63 | +} |
| 64 | + |
| 65 | +void serial_init(serial_t *obj, PinName tx, PinName rx) { |
| 66 | + |
| 67 | + // determine the UART to use |
| 68 | + UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
| 69 | + UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
| 70 | + UARTName uart_instance = (UARTName)pinmap_merge(uart_tx, uart_rx); |
| 71 | + if ((int)uart_instance == NC) { |
| 72 | + error("Serial pinout mapping failed"); |
| 73 | + } |
| 74 | + |
| 75 | + switch (uart_instance) { |
| 76 | + case UART_0: obj->index = 0; break; |
| 77 | + case UART_1: obj->index = 1; break; |
| 78 | + case UART_2: obj->index = 2; break; |
| 79 | + } |
| 80 | + |
| 81 | + uart_config_t uart_config; |
| 82 | + uart_config.baudRate = 9600; |
| 83 | + uart_config.bitCountPerChar = kUart8BitsPerChar; |
| 84 | + uart_config.parityMode = kUartParityDisabled; |
| 85 | + uart_config.rxDataInvert = 0; |
| 86 | + uart_config.stopBitCount = kUartOneStopBit; |
| 87 | + uart_config.txDataInvert = 0; |
| 88 | + |
| 89 | + uart_config.uartSourceClockInHz = serial_get_clock(obj->index); |
| 90 | + |
| 91 | + clock_manager_set_gate(kClockModuleUART, obj->index, true); |
| 92 | + uart_hal_init(obj->index, &uart_config); |
| 93 | + |
| 94 | + pinmap_pinout(tx, PinMap_UART_TX); |
| 95 | + pinmap_pinout(rx, PinMap_UART_RX); |
| 96 | + |
| 97 | + pin_mode(tx, PullUp); |
| 98 | + pin_mode(rx, PullUp); |
| 99 | + |
| 100 | + if (uart_instance == STDIO_UART) { |
| 101 | + stdio_uart_inited = 1; |
| 102 | + memcpy(&stdio_uart, obj, sizeof(serial_t)); |
| 103 | + } |
| 104 | +} |
| 105 | + |
| 106 | +void serial_free(serial_t *obj) { |
| 107 | + serial_irq_ids[obj->index] = 0; |
| 108 | +} |
| 109 | + |
| 110 | +void serial_baud(serial_t *obj, int baudrate) { |
| 111 | + uart_hal_set_baud_rate(obj->index, serial_get_clock(obj->index), (uint32_t)baudrate); |
| 112 | +} |
| 113 | + |
| 114 | +void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { |
| 115 | + uart_hal_configure_bit_count_per_char(obj->index, (uart_bit_count_per_char_t)data_bits); |
| 116 | + uart_hal_configure_parity_mode(obj->index, (uart_parity_mode_t)parity); |
| 117 | + uart_hal_configure_stop_bit_count(obj->index, (uart_stop_bit_count_t)stop_bits); |
| 118 | +} |
| 119 | + |
| 120 | +/****************************************************************************** |
| 121 | + * INTERRUPTS HANDLING |
| 122 | + ******************************************************************************/ |
| 123 | +static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) { |
| 124 | + if (serial_irq_ids[index] != 0) { |
| 125 | + if (transmit_empty) |
| 126 | + irq_handler(serial_irq_ids[index], TxIrq); |
| 127 | + |
| 128 | + if (receive_full) |
| 129 | + irq_handler(serial_irq_ids[index], RxIrq); |
| 130 | + } |
| 131 | +} |
| 132 | + |
| 133 | +void uart0_irq() { |
| 134 | + uart_irq(uart_hal_is_transmit_data_register_empty(0), uart_hal_is_receive_data_register_full(0), 0); |
| 135 | + if (uart_hal_is_receive_overrun_detected(0)) |
| 136 | + uart_hal_clear_status_flag(0, kUartReceiveOverrun); |
| 137 | +} |
| 138 | +void uart1_irq() { |
| 139 | + uart_irq(uart_hal_is_transmit_data_register_empty(1), uart_hal_is_receive_data_register_full(1), 1); |
| 140 | +} |
| 141 | + |
| 142 | +void uart2_irq() { |
| 143 | + uart_irq(uart_hal_is_transmit_data_register_empty(2), uart_hal_is_receive_data_register_full(2), 2); |
| 144 | +} |
| 145 | + |
| 146 | +void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { |
| 147 | + irq_handler = handler; |
| 148 | + serial_irq_ids[obj->index] = id; |
| 149 | +} |
| 150 | + |
| 151 | +void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { |
| 152 | + IRQn_Type irq_n = (IRQn_Type)0; |
| 153 | + uint32_t vector = 0; |
| 154 | + |
| 155 | + switch (obj->index) { |
| 156 | + case 0: irq_n=UART0_RX_TX_IRQn; vector = (uint32_t)&uart0_irq; break; |
| 157 | + case 1: irq_n=UART1_RX_TX_IRQn; vector = (uint32_t)&uart1_irq; break; |
| 158 | + case 2: irq_n=UART2_RX_TX_IRQn; vector = (uint32_t)&uart2_irq; break; |
| 159 | + } |
| 160 | + |
| 161 | + if (enable) { |
| 162 | + switch (irq) { |
| 163 | + case RxIrq: uart_hal_enable_rx_data_register_full_interrupt(obj->index); break; |
| 164 | + case TxIrq: uart_hal_enable_tx_data_register_empty_interrupt(obj->index); break; |
| 165 | + } |
| 166 | + NVIC_SetVector(irq_n, vector); |
| 167 | + NVIC_EnableIRQ(irq_n); |
| 168 | + |
| 169 | + } else { // disable |
| 170 | + int all_disabled = 0; |
| 171 | + SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); |
| 172 | + switch (irq) { |
| 173 | + case RxIrq: uart_hal_disable_rx_data_register_full_interrupt(obj->index); break; |
| 174 | + case TxIrq: uart_hal_enable_tx_data_register_empty_interrupt(obj->index); break; |
| 175 | + } |
| 176 | + switch (other_irq) { |
| 177 | + case RxIrq: all_disabled = uart_hal_is_receive_data_full_interrupt_enabled(obj->index) == 0; break; |
| 178 | + case TxIrq: all_disabled = uart_hal_is_tx_data_register_empty_interrupt_enabled(obj->index) == 0; break; |
| 179 | + } |
| 180 | + if (all_disabled) |
| 181 | + NVIC_DisableIRQ(irq_n); |
| 182 | + } |
| 183 | +} |
| 184 | + |
| 185 | +int serial_getc(serial_t *obj) { |
| 186 | + while (!serial_readable(obj)); |
| 187 | + uint8_t data; |
| 188 | + uart_hal_getchar(obj->index, &data); |
| 189 | + |
| 190 | + return data; |
| 191 | +} |
| 192 | + |
| 193 | +void serial_putc(serial_t *obj, int c) { |
| 194 | + while (!serial_writable(obj)); |
| 195 | + uart_hal_putchar(obj->index, (uint8_t)c); |
| 196 | +} |
| 197 | + |
| 198 | +int serial_readable(serial_t *obj) { |
| 199 | + if (uart_hal_is_receive_overrun_detected(obj->index)) |
| 200 | + uart_hal_clear_status_flag(obj->index, kUartReceiveOverrun); |
| 201 | + return uart_hal_is_receive_data_register_full(obj->index); |
| 202 | +} |
| 203 | + |
| 204 | +int serial_writable(serial_t *obj) { |
| 205 | + if (uart_hal_is_receive_overrun_detected(obj->index)) |
| 206 | + uart_hal_clear_status_flag(obj->index, kUartReceiveOverrun); |
| 207 | + |
| 208 | + return uart_hal_is_transmit_data_register_empty(obj->index); |
| 209 | +} |
| 210 | + |
| 211 | +void serial_clear(serial_t *obj) { |
| 212 | +} |
| 213 | + |
| 214 | +void serial_pinout_tx(PinName tx) { |
| 215 | + pinmap_pinout(tx, PinMap_UART_TX); |
| 216 | +} |
| 217 | + |
| 218 | +void serial_break_set(serial_t *obj) { |
| 219 | + uart_hal_queue_break_char_to_send(obj->index, true); |
| 220 | +} |
| 221 | + |
| 222 | +void serial_break_clear(serial_t *obj) { |
| 223 | + uart_hal_queue_break_char_to_send(obj->index, false); |
| 224 | +} |
101 | 225 |
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