[NUCLEO_F103RB] Test porting

Ported GPIO and UART tests, verified as working.

Author: Bogdan Marinescu

libraries/tests/mbed/digitalin_digitalout/main.cpp

@@ -1,6 +1,5 @@
 #include "test_env.h"
 
-
 #if defined(TARGET_KL25Z)
 DigitalOut out(PTA5);
 DigitalIn  in(PTC6);
@@ -13,6 +12,10 @@ DigitalIn   in(PTB1);
 DigitalOut out(dp1);
 DigitalIn   in(dp2);
 
+#elif defined(TARGET_NUCLEO_F103RB)
+DigitalOut out(PC_6);
+DigitalIn   in(PB_8);
+
 #else
 DigitalOut out(p5);
 DigitalIn   in(p25);

libraries/tests/mbed/digitalinout/main.cpp

@@ -12,6 +12,10 @@ DigitalInOut d2(PTB1);
 DigitalInOut d1(dp1);
 DigitalInOut d2(dp2);
 
+#elif defined(TARGET_NUCLEO_F103RB)
+DigitalInOut d1(PC_6);
+DigitalInOut d2(PB_8);
+
 #else
 DigitalInOut d1(p5);
 DigitalInOut d2(p25);

libraries/tests/mbed/portinout/main.cpp

@@ -44,6 +44,15 @@
 #define P2_1    (1 << 5)  // PTC5
 #define P2_2    (1 << 6)  // PTC6
 #define PORT_2  PortC
+
+#elif defined(TARGET_NUCLEO_F103RB)
+#define P1_1    (1 << 6)  // PC_6
+#define P1_2    (1 << 5)  // PC_5
+#define PORT_1  PortC
+
+#define P2_1    (1 << 8)  // PB_8
+#define P2_2    (1 << 9)  // PB_9
+#define PORT_2  PortB
 #endif
 
 #define MASK_1   (P1_1 | P1_2)

libraries/tests/mbed/portout_portin/main.cpp

@@ -44,6 +44,15 @@
 #define P2_1    (1 << 5)  // PTC5
 #define P2_2    (1 << 6)  // PTC6
 #define PORT_2  PortC
+
+#elif defined(TARGET_NUCLEO_F103RB)
+#define P1_1    (1 << 6)  // PC_6
+#define P1_2    (1 << 5)  // PC_5
+#define PORT_1  PortC
+
+#define P2_1    (1 << 8)  // PB_8
+#define P2_2    (1 << 9)  // PB_9
+#define PORT_2  PortB
 #endif
 
 #define MASK_1   (P1_1 | P1_2)

libraries/tests/mbed/serial_interrupt/main.cpp

@@ -3,8 +3,12 @@
 DigitalOut led1(LED1);
 DigitalOut led2(LED2);
 
+#ifndef TARGET_NUCLEO_F103RB
 Serial computer(USBTX, USBRX);
- 
+#else
+Serial computer(UART_TX, UART_RX);
+#endif
+
 // This function is called when a character goes into the TX buffer.
 void txCallback() {
     led1 = !led1;

workspace_tools/tests.py

@@ -41,10 +41,12 @@
   * digital_loop (Digital(In|Out|InOut), InterruptIn):
       * LPC1*: (p5   <-> p25 )
       * KL25Z: (PTA5<-> PTC6)
+      * NUCLEO_F103RB: (PC_6 <-> PB_8)
   
   * port_loop (Port(In|Out|InOut)):
       * LPC1*: (p5   <-> p25 ), (p6   <-> p26 )
       * KL25Z: (PTA5 <-> PTC6), (PTA4 <-> PTC5)
+      * NUCLEO_F103RB: (PC_6 <-> PB_8), (PC_5 <-> PB_9)
   
   * analog_loop (AnalogIn, AnalogOut):
       * LPC1*: (p17   <-> p18 )