[NANO130] Remove SPI MOSI1/MISO1 pins from pinmap

MOSI1/MISO1 are used in second bit of 2-bit transfer mode and cannot be used
for normal MOSI/MISO. Remove them from pinmap.

This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - basic test.

Author: ccli8

targets/TARGET_NUVOTON/TARGET_NANO100/PeripheralPins.c

@@ -145,11 +145,8 @@ const PinMap PinMap_SPI_MOSI[] = {
     {PB_7, SPI_2, SYS_PB_L_MFP_PB7_MFP_SPI2_MOSI0},
     {PB_10, SPI_0, SYS_PB_H_MFP_PB10_MFP_SPI0_MOSI0},
     {PC_3, SPI_0, SYS_PC_L_MFP_PC3_MFP_SPI0_MOSI0},
-    {PC_5, SPI_0, SYS_PC_L_MFP_PC5_MFP_SPI0_MOSI1},
     {PC_11, SPI_1, SYS_PC_H_MFP_PC11_MFP_SPI1_MOSI0},
-    {PC_13, SPI_1, SYS_PC_H_MFP_PC13_MFP_SPI1_MOSI1},
     {PD_3, SPI_2, SYS_PD_L_MFP_PD3_MFP_SPI2_MOSI0},
-    {PD_5, SPI_2, SYS_PD_L_MFP_PD5_MFP_SPI2_MOSI1},
     {PE_4, SPI_0, SYS_PE_L_MFP_PE4_MFP_SPI0_MOSI0},
 
     {NC,    NC,    0}
@@ -161,11 +158,8 @@ const PinMap PinMap_SPI_MISO[] = {
     {PB_6, SPI_2, SYS_PB_L_MFP_PB6_MFP_SPI2_MISO0},
     {PB_11, SPI_0, SYS_PB_H_MFP_PB11_MFP_SPI0_MISO0},
     {PC_2, SPI_0, SYS_PC_L_MFP_PC2_MFP_SPI0_MISO0},
-    {PC_4, SPI_0, SYS_PC_L_MFP_PC4_MFP_SPI0_MISO1},
     {PC_10, SPI_1, SYS_PC_H_MFP_PC10_MFP_SPI1_MISO0},
-    {PC_12, SPI_1, SYS_PC_H_MFP_PC12_MFP_SPI1_MISO1},
     {PD_2, SPI_2, SYS_PD_L_MFP_PD2_MFP_SPI2_MISO0},
-    {PD_4, SPI_2, SYS_PD_L_MFP_PD4_MFP_SPI2_MISO1},
     {PE_3, SPI_0, SYS_PE_L_MFP_PE3_MFP_SPI0_MISO0},
 
     {NC,    NC,    0}