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Deepika
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Update the linker script to support RW/ZI/Heap span across RAM banks
As per EWARM Development guide A region consists of one or several memory ranges, where each memory range consists of a continuous sequence of bytes in a specific memory. Several ranges can be combined by using region expressions. Note that those ranges do not need to be consecutive or even in the same memory. RAM region here is made as combination of 2-RAM banks define region RAM_region = mem:[from __SRAM2_start__ to __SRAM2_end__] | mem:[from __SRAM1_start__ to __SRAM1_end__]; block can be placed in specific region which can have several ranges. place in RAM_region { block RW }; place in RAM_region { block ZI }; place in RAM_region { block HEAP };
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Lines changed: 54 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -1,41 +1,69 @@
1+
/* -DMBED_ROM_START=0x8000000 -DMBED_ROM_SIZE=0x40000 */
2+
3+
/* [ROM = 256kb = 0x40000] */
14
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
25
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x40000; }
36

4-
/* [ROM = 256kb = 0x40000] */
5-
define symbol __intvec_start__ = MBED_APP_START;
6-
define symbol __region_ROM_start__ = MBED_APP_START;
7-
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
87

98
/* [RAM = 48kb + 16kb = 0xC000] */
10-
/* Vector table dynamic copy: Total: 99 vectors * 4 = 396 bytes (0x18C) to be reserved in RAM */
11-
define symbol __NVIC_start__ = 0x10000000;
12-
define symbol __NVIC_end__ = 0x1000018F; /* Add 4 more bytes to be aligned on 8 bytes */
13-
define symbol __region_SRAM2_start__ = 0x10000190;
14-
define symbol __region_SRAM2_end__ = 0x10003FFF;
15-
define symbol __region_SRAM1_start__ = 0x20000000;
16-
define symbol __region_SRAM1_end__ = 0x2000BFFF;
9+
if (!isdefinedsymbol(MBED_RAM_START)) { define symbol MBED_RAM_START = 0x10000000; }
10+
if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x4000; }
1711

18-
/* Memory regions */
19-
define memory mem with size = 4G;
20-
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
21-
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
22-
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
12+
if (!isdefinedsymbol(MBED_RAM1_START)) { define symbol MBED_RAM1_START = 0x20000000; }
13+
if (!isdefinedsymbol(MBED_RAM1_SIZE)) { define symbol MBED_RAM1_SIZE = 0xC000; }
14+
15+
/* Vector table dynamic copy: Total: 99 vectors * 4 = 396 bytes (0x18C) to be reserved in RAM */
16+
if (!isdefinedsymbol(VECTOR_SIZE)) {
17+
define symbol VECTOR_SIZE = 0x190; /* Add 4 more bytes to be aligned on 8 bytes */
18+
}
2319

2420
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
2521
define symbol MBED_BOOT_STACK_SIZE = 0x400;
2622
}
2723

28-
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
29-
define symbol __size_heap__ = 0x4000;
24+
if (!isdefinedsymbol(HEAP_SIZE)) {
25+
define symbol HEAP_SIZE = 0x4000;
26+
}
27+
28+
define symbol __intvec_start__ = MBED_APP_START;
29+
define symbol __ROM_start__ = MBED_APP_START;
30+
define symbol __ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
31+
32+
/* SRAM 2 */
33+
define symbol __NVIC_start__ = MBED_RAM_START;
34+
define symbol __NVIC_end__ = MBED_RAM_START + VECTOR_SIZE - 1;
35+
36+
define symbol __CSTACK_start__ = MBED_RAM_START + VECTOR_SIZE;
37+
define symbol __CSTACK_end__ = MBED_RAM_START + VECTOR_SIZE + MBED_BOOT_STACK_SIZE - 1;
38+
39+
define symbol __SRAM2_start__ = MBED_RAM_START + VECTOR_SIZE + MBED_BOOT_STACK_SIZE;
40+
define symbol __SRAM2_end__ = MBED_RAM_START + MBED_RAM_SIZE - 1;
41+
42+
/* SRAM 1*/
43+
define symbol __SRAM1_start__ = MBED_RAM1_START;
44+
define symbol __SRAM1_end__ = MBED_RAM1_START + MBED_RAM1_SIZE - 1;
45+
46+
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
47+
define symbol __size_heap__ = HEAP_SIZE;
48+
49+
/* Memory regions */
50+
define memory mem with size = 4G;
51+
define region ROM_region = mem:[from __ROM_start__ to __ROM_end__];
52+
define region CSTACK_region = mem:[from __CSTACK_start__ to __CSTACK_end__];
53+
define region RAM_region = mem:[from __SRAM2_start__ to __SRAM2_end__]
54+
| mem:[from __SRAM1_start__ to __SRAM1_end__];
55+
3056
define block CSTACK with alignment = 8, size = __size_cstack__ { };
31-
define block HEAP with alignment = 8, size = __size_heap__ { };
32-
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
57+
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
58+
define block RW { readwrite };
59+
define block ZI { zi };
3360

3461
initialize by copy with packing = zeros { readwrite };
35-
do not initialize { section .noinit };
36-
37-
place at address mem:__intvec_start__ { readonly section .intvec };
62+
do not initialize { section .noinit };
3863

39-
place in ROM_region { readonly };
40-
place in SRAM1_region { readwrite, block STACKHEAP };
41-
place in SRAM2_region { };
64+
place at address mem:__intvec_start__ { readonly section .intvec };
65+
place in ROM_region { readonly };
66+
place in CSTACK_region { block CSTACK };
67+
place in RAM_region { block RW };
68+
place in RAM_region { block ZI };
69+
place in RAM_region { block HEAP };
Lines changed: 59 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,47 +1,75 @@
1-
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2-
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
1+
/* -DMBED_ROM_START=0x8000000 -DMBED_ROM_SIZE=0x100000 */
32

43
/* [ROM = 1024kb = 0x100000] */
5-
define symbol __intvec_start__ = MBED_APP_START;
6-
define symbol __region_ROM_start__ = MBED_APP_START;
7-
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
4+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
5+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
86

97
/* [RAM = 96kb + 32kb = 0x20000] */
10-
/* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */
11-
define symbol __NVIC_start__ = 0x10000000;
12-
define symbol __NVIC_end__ = 0x10000187;
13-
define symbol __region_SRAM2_start__ = 0x10000188;
14-
define symbol __region_SRAM2_end__ = 0x10007FFF;
15-
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
16-
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
17-
define symbol __region_SRAM1_start__ = 0x20000100;
18-
define symbol __region_SRAM1_end__ = 0x20017FFF;
8+
if (!isdefinedsymbol(MBED_RAM_START)) { define symbol MBED_RAM_START = 0x10000000; }
9+
if (!isdefinedsymbol(MBED_RAM_SIZE)) { define symbol MBED_RAM_SIZE = 0x8000; }
1910

20-
/* Memory regions */
21-
define memory mem with size = 4G;
22-
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
23-
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
24-
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
25-
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
11+
if (!isdefinedsymbol(MBED_RAM1_START)) { define symbol MBED_RAM1_START = 0x20000000; }
12+
if (!isdefinedsymbol(MBED_RAM1_SIZE)) { define symbol MBED_RAM1_SIZE = 0x18000; }
2613

27-
/* Define Crash Data Symbols */
28-
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
29-
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
14+
/* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */
15+
if (!isdefinedsymbol(VECTOR_SIZE)) {
16+
define symbol VECTOR_SIZE = 0x188;
17+
}
3018

3119
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
3220
define symbol MBED_BOOT_STACK_SIZE = 0x400;
3321
}
3422

23+
if (!isdefinedsymbol(MBED_CRASH_REPORT_RAM_SIZE)) {
24+
define symbol MBED_CRASH_REPORT_RAM_SIZE = 0x100;
25+
}
26+
27+
if (!isdefinedsymbol(HEAP_SIZE)) {
28+
define symbol HEAP_SIZE = 0x12000;
29+
}
30+
31+
define symbol __intvec_start__ = MBED_APP_START;
32+
define symbol __ROM_start__ = MBED_APP_START;
33+
define symbol __ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
34+
35+
/* SRAM 2 */
36+
define symbol __NVIC_start__ = MBED_RAM_START;
37+
define symbol __NVIC_end__ = MBED_RAM_START + VECTOR_SIZE - 1;
38+
39+
define exported symbol __CRASH_DATA_RAM_START__ = MBED_RAM_START + VECTOR_SIZE;
40+
define exported symbol __CRASH_DATA_RAM_END__ = MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE - 1;
41+
42+
define symbol __CSTACK_start__ = MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE;
43+
define symbol __CSTACK_end__ = MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE + MBED_BOOT_STACK_SIZE - 1;
44+
45+
define symbol __SRAM2_start__ = MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE + MBED_BOOT_STACK_SIZE;
46+
define symbol __SRAM2_end__ = MBED_RAM_START + MBED_RAM_SIZE - 1;
47+
48+
/* SRAM 1*/
49+
define symbol __SRAM1_start__ = MBED_RAM1_START;
50+
define symbol __SRAM1_end__ = MBED_RAM1_START + MBED_RAM1_SIZE - 1;
51+
3552
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
36-
define symbol __size_heap__ = 0x17000;
53+
define symbol __size_heap__ = HEAP_SIZE;
54+
55+
/* Memory regions */
56+
define memory mem with size = 4G;
57+
define region ROM_region = mem:[from __ROM_start__ to __ROM_end__];
58+
define region CSTACK_region = mem:[from __CSTACK_start__ to __CSTACK_end__];
59+
define region RAM_region = mem:[from __SRAM2_start__ to __SRAM2_end__]
60+
| mem:[from __SRAM1_start__ to __SRAM1_end__];
61+
3762
define block CSTACK with alignment = 8, size = __size_cstack__ { };
38-
define block HEAP with alignment = 8, size = __size_heap__ { };
63+
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
64+
define block RW { readwrite };
65+
define block ZI { zi };
3966

4067
initialize by copy with packing = zeros { readwrite };
41-
do not initialize { section .noinit };
42-
43-
place at address mem:__intvec_start__ { readonly section .intvec };
68+
do not initialize { section .noinit };
4469

45-
place in ROM_region { readonly };
46-
place in SRAM1_region { readwrite, block HEAP };
47-
place in SRAM2_region { first block CSTACK, zeroinit };
70+
place at address mem:__intvec_start__ { readonly section .intvec };
71+
place in ROM_region { readonly };
72+
place in CSTACK_region { block CSTACK };
73+
place in RAM_region { block RW };
74+
place in RAM_region { block ZI };
75+
place in RAM_region { block HEAP };

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