@@ -36,6 +36,7 @@ using namespace mbed;
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#define UINT64_MAX -1
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#endif
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#define QSPI_NO_ADDRESS_COMMAND UINT64_MAX
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+ #define QSPI_ALT_DEFAULT_VALUE 0
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// Status Register Bits
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#define QSPIF_STATUS_BIT_WIP 0x1 // Write In Progress
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#define QSPIF_STATUS_BIT_WEL 0x2 // Write Enable Latch
@@ -168,12 +169,12 @@ int QSPIFBlockDevice::init()
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_inst_width = QSPI_CFG_BUS_SINGLE;
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_address_width = QSPI_CFG_BUS_SINGLE;
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_address_size = QSPI_CFG_ADDR_SIZE_24;
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+ _alt_size = 0 ;
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+ _dummy_cycles = 0 ;
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_data_width = QSPI_CFG_BUS_SINGLE;
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- _dummy_and_mode_cycles = 0 ;
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_write_register_inst = QSPIF_WRSR;
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_read_register_inst = QSPIF_RDSR;
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-
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if (QSPI_STATUS_OK != _qspi_set_frequency (_freq)) {
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tr_error (" QSPI Set Frequency Failed" );
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status = QSPIF_BD_ERROR_DEVICE_ERROR;
@@ -302,15 +303,15 @@ int QSPIFBlockDevice::read(void *buffer, bd_addr_t addr, bd_size_t size)
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_mutex.lock ();
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// Configure Bus for Reading
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- _qspi_configure_format (_inst_width, _address_width, _address_size, QSPI_CFG_BUS_SINGLE,
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- 0 , _data_width, _dummy_and_mode_cycles );
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+ _qspi_configure_format (_inst_width, _address_width, _address_size, _address_width, // Alt width == address width
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+ _alt_size , _data_width, _dummy_cycles );
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if (QSPI_STATUS_OK != _qspi_send_read_command (_read_instruction, buffer, addr, size)) {
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status = QSPIF_BD_ERROR_DEVICE_ERROR;
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tr_error (" Read Command failed" );
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}
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- // All commands other than Read use default 1-1-1 Bus mode (Program/Erase are constrained by flash memory performance less than that of the bus)
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+ // All commands other than Read use default 1-1-1 Bus mode (Program/Erase are constrained by flash memory performance more than bus performance )
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_qspi_configure_format (QSPI_CFG_BUS_SINGLE, QSPI_CFG_BUS_SINGLE, QSPI_CFG_ADDR_SIZE_24, QSPI_CFG_BUS_SINGLE,
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0 , QSPI_CFG_BUS_SINGLE, 0 );
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@@ -1024,8 +1025,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE];
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set_quad_enable = true ;
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is_qpi_mode = true ;
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- _dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1 ] & 0x1F );
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_444_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles * 4 ;
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tr_debug (" Read Bus Mode set to 4-4-4, Instruction: 0x%xh" , _read_instruction);
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// _inst_width = QSPI_CFG_BUS_QUAD;
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_address_width = QSPI_CFG_BUS_QUAD;
@@ -1038,9 +1040,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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// Fast Read 1-4-4 Supported
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE];
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set_quad_enable = true ;
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- // dummy cycles + mode cycles = Dummy Cycles
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- _dummy_and_mode_cycles = ( basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1 ] & 0x1F ) ;
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_144_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles * 4 ;
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_address_width = QSPI_CFG_BUS_QUAD;
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_data_width = QSPI_CFG_BUS_QUAD;
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tr_debug (" Read Bus Mode set to 1-4-4, Instruction: 0x%xh" , _read_instruction);
@@ -1051,8 +1053,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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// Fast Read 1-1-4 Supported
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE];
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set_quad_enable = true ;
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- _dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1 ] & 0x1F );
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_114_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles;
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_data_width = QSPI_CFG_BUS_QUAD;
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tr_debug (" Read Bus Mode set to 1-1-4, Instruction: 0x%xh" , _read_instruction);
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break ;
@@ -1061,8 +1064,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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if (examined_byte & 0x01 ) {
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// Fast Read 2-2-2 Supported
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE];
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- _dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1 ] & 0x1F );
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_222_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles * 2 ;
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_address_width = QSPI_CFG_BUS_DUAL;
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_data_width = QSPI_CFG_BUS_DUAL;
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tr_debug (" Read Bus Mode set to 2-2-2, Instruction: 0x%xh" , _read_instruction);
@@ -1073,8 +1077,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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if (examined_byte & 0x10 ) {
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// Fast Read 1-2-2 Supported
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE];
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- _dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1 ] & 0x1F );
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_122_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles * 2 ;
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_address_width = QSPI_CFG_BUS_DUAL;
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_data_width = QSPI_CFG_BUS_DUAL;
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tr_debug (" Read Bus Mode set to 1-2-2, Instruction: 0x%xh" , _read_instruction);
@@ -1083,8 +1088,9 @@ int QSPIFBlockDevice::_sfdp_detect_best_bus_read_mode(uint8_t *basic_param_table
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if (examined_byte & 0x01 ) {
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// Fast Read 1-1-2 Supported
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read_inst = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE];
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- _dummy_and_mode_cycles = (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1 ] >> 5 )
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- + (basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1 ] & 0x1F );
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+ _dummy_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1 ] & 0x1F ;
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+ uint8_t mode_cycles = basic_param_table_ptr[QSPIF_BASIC_PARAM_TABLE_112_READ_INST_BYTE - 1 ] >> 5 ;
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+ _alt_size = mode_cycles;
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_data_width = QSPI_CFG_BUS_DUAL;
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tr_debug (" Read Bus Mode set to 1-1-2, Instruction: 0x%xh" , _read_instruction);
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break ;
@@ -1322,7 +1328,7 @@ qspi_status_t QSPIFBlockDevice::_qspi_send_read_command(unsigned int read_inst,
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// Send Read command to device driver
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size_t buf_len = size;
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- if (_qspi.read (read_inst, - 1 , (unsigned int )addr, (char *)buffer, &buf_len) != QSPI_STATUS_OK) {
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+ if (_qspi.read (read_inst, (_alt_size == 0 ) ? - 1 : QSPI_ALT_DEFAULT_VALUE , (unsigned int )addr, (char *)buffer, &buf_len) != QSPI_STATUS_OK) {
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tr_error (" Read failed" );
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return QSPI_STATUS_ERROR;
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}
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