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Merge pull request #1853 from svastm/update_cube_l4
[STM32L4XX] Update HAL_Cube_L4 to 1.5.1
2 parents bead017 + 92688ed commit 7d583e5

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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/Release_Notes_stm32l4xx_hal.html

Lines changed: 140 additions & 4 deletions
Large diffs are not rendered by default.

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s

Lines changed: 18 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
1-
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
1+
;********************** COPYRIGHT(c) 2016 STMicroelectronics ******************
22
;* File Name : startup_stm32l476xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.0.0
5-
;* Date : 26-June-2015
6-
;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM_MICRO toolchain.
4+
;* Version : V1.1.1
5+
;* Date : 29-April-2016
6+
;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM toolchain.
77
;* This module performs:
88
;* - Set the initial SP
99
;* - Set the initial PC == Reset_Handler
@@ -14,7 +14,7 @@
1414
;* priority is Privileged, and the Stack is set to Main.
1515
;* <<< Use Configuration Wizard in Context Menu >>>
1616
;*******************************************************************************
17-
;
17+
;*
1818
;* Redistribution and use in source and binary forms, with or without modification,
1919
;* are permitted provided that the following conditions are met:
2020
;* 1. Redistributions of source code must retain the above copyright notice,
@@ -61,6 +61,7 @@ __heap_limit
6161
PRESERVE8
6262
THUMB
6363

64+
6465
; Vector Table Mapped to Address 0 at Reset
6566
AREA RESET, DATA, READONLY
6667
EXPORT __Vectors
@@ -127,7 +128,7 @@ __Vectors DCD __initial_sp ; Top of Stack
127128
DCD USART3_IRQHandler ; USART3
128129
DCD EXTI15_10_IRQHandler ; External Line[15:10]
129130
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
130-
DCD DFSDM3_IRQHandler ; SD Filter 3 global Interrupt
131+
DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
131132
DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
132133
DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
133134
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
@@ -146,9 +147,9 @@ __Vectors DCD __initial_sp ; Top of Stack
146147
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
147148
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
148149
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
149-
DCD DFSDM0_IRQHandler ; SD Filter 0 global Interrupt
150-
DCD DFSDM1_IRQHandler ; SD Filter 1 global Interrupt
151-
DCD DFSDM2_IRQHandler ; SD Filter 2 global Interrupt
150+
DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
151+
DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
152+
DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
152153
DCD COMP_IRQHandler ; COMP Interrupt
153154
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
154155
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
@@ -274,7 +275,7 @@ Default_Handler PROC
274275
EXPORT USART3_IRQHandler [WEAK]
275276
EXPORT EXTI15_10_IRQHandler [WEAK]
276277
EXPORT RTC_Alarm_IRQHandler [WEAK]
277-
EXPORT DFSDM3_IRQHandler [WEAK]
278+
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
278279
EXPORT TIM8_BRK_IRQHandler [WEAK]
279280
EXPORT TIM8_UP_IRQHandler [WEAK]
280281
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
@@ -293,9 +294,9 @@ Default_Handler PROC
293294
EXPORT DMA2_Channel3_IRQHandler [WEAK]
294295
EXPORT DMA2_Channel4_IRQHandler [WEAK]
295296
EXPORT DMA2_Channel5_IRQHandler [WEAK]
296-
EXPORT DFSDM0_IRQHandler [WEAK]
297-
EXPORT DFSDM1_IRQHandler [WEAK]
298-
EXPORT DFSDM2_IRQHandler [WEAK]
297+
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
298+
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
299+
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
299300
EXPORT COMP_IRQHandler [WEAK]
300301
EXPORT LPTIM1_IRQHandler [WEAK]
301302
EXPORT LPTIM2_IRQHandler [WEAK]
@@ -356,7 +357,7 @@ USART2_IRQHandler
356357
USART3_IRQHandler
357358
EXTI15_10_IRQHandler
358359
RTC_Alarm_IRQHandler
359-
DFSDM3_IRQHandler
360+
DFSDM1_FLT3_IRQHandler
360361
TIM8_BRK_IRQHandler
361362
TIM8_UP_IRQHandler
362363
TIM8_TRG_COM_IRQHandler
@@ -375,9 +376,9 @@ DMA2_Channel2_IRQHandler
375376
DMA2_Channel3_IRQHandler
376377
DMA2_Channel4_IRQHandler
377378
DMA2_Channel5_IRQHandler
378-
DFSDM0_IRQHandler
379-
DFSDM1_IRQHandler
380-
DFSDM2_IRQHandler
379+
DFSDM1_FLT0_IRQHandler
380+
DFSDM1_FLT1_IRQHandler
381+
DFSDM1_FLT2_IRQHandler
381382
COMP_IRQHandler
382383
LPTIM1_IRQHandler
383384
LPTIM2_IRQHandler

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s

Lines changed: 18 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
1-
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
1+
;********************** COPYRIGHT(c) 2016 STMicroelectronics ******************
22
;* File Name : startup_stm32l476xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.0.0
5-
;* Date : 26-June-2015
6-
;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM_STD toolchain.
4+
;* Version : V1.1.1
5+
;* Date : 29-April-2016
6+
;* Description : STM32L476xx Ultra Low Power devices vector table for MDK-ARM toolchain.
77
;* This module performs:
88
;* - Set the initial SP
99
;* - Set the initial PC == Reset_Handler
@@ -14,7 +14,7 @@
1414
;* priority is Privileged, and the Stack is set to Main.
1515
;* <<< Use Configuration Wizard in Context Menu >>>
1616
;*******************************************************************************
17-
;
17+
;*
1818
;* Redistribution and use in source and binary forms, with or without modification,
1919
;* are permitted provided that the following conditions are met:
2020
;* 1. Redistributions of source code must retain the above copyright notice,
@@ -44,6 +44,7 @@ __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standb
4444
PRESERVE8
4545
THUMB
4646

47+
4748
; Vector Table Mapped to Address 0 at Reset
4849
AREA RESET, DATA, READONLY
4950
EXPORT __Vectors
@@ -110,7 +111,7 @@ __Vectors DCD __initial_sp ; Top of Stack
110111
DCD USART3_IRQHandler ; USART3
111112
DCD EXTI15_10_IRQHandler ; External Line[15:10]
112113
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
113-
DCD DFSDM3_IRQHandler ; SD Filter 3 global Interrupt
114+
DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
114115
DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
115116
DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
116117
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
@@ -129,9 +130,9 @@ __Vectors DCD __initial_sp ; Top of Stack
129130
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
130131
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
131132
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
132-
DCD DFSDM0_IRQHandler ; SD Filter 0 global Interrupt
133-
DCD DFSDM1_IRQHandler ; SD Filter 1 global Interrupt
134-
DCD DFSDM2_IRQHandler ; SD Filter 2 global Interrupt
133+
DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
134+
DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
135+
DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
135136
DCD COMP_IRQHandler ; COMP Interrupt
136137
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
137138
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
@@ -257,7 +258,7 @@ Default_Handler PROC
257258
EXPORT USART3_IRQHandler [WEAK]
258259
EXPORT EXTI15_10_IRQHandler [WEAK]
259260
EXPORT RTC_Alarm_IRQHandler [WEAK]
260-
EXPORT DFSDM3_IRQHandler [WEAK]
261+
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
261262
EXPORT TIM8_BRK_IRQHandler [WEAK]
262263
EXPORT TIM8_UP_IRQHandler [WEAK]
263264
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
@@ -276,9 +277,9 @@ Default_Handler PROC
276277
EXPORT DMA2_Channel3_IRQHandler [WEAK]
277278
EXPORT DMA2_Channel4_IRQHandler [WEAK]
278279
EXPORT DMA2_Channel5_IRQHandler [WEAK]
279-
EXPORT DFSDM0_IRQHandler [WEAK]
280-
EXPORT DFSDM1_IRQHandler [WEAK]
281-
EXPORT DFSDM2_IRQHandler [WEAK]
280+
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
281+
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
282+
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
282283
EXPORT COMP_IRQHandler [WEAK]
283284
EXPORT LPTIM1_IRQHandler [WEAK]
284285
EXPORT LPTIM2_IRQHandler [WEAK]
@@ -339,7 +340,7 @@ USART2_IRQHandler
339340
USART3_IRQHandler
340341
EXTI15_10_IRQHandler
341342
RTC_Alarm_IRQHandler
342-
DFSDM3_IRQHandler
343+
DFSDM1_FLT3_IRQHandler
343344
TIM8_BRK_IRQHandler
344345
TIM8_UP_IRQHandler
345346
TIM8_TRG_COM_IRQHandler
@@ -358,9 +359,9 @@ DMA2_Channel2_IRQHandler
358359
DMA2_Channel3_IRQHandler
359360
DMA2_Channel4_IRQHandler
360361
DMA2_Channel5_IRQHandler
361-
DFSDM0_IRQHandler
362-
DFSDM1_IRQHandler
363-
DFSDM2_IRQHandler
362+
DFSDM1_FLT0_IRQHandler
363+
DFSDM1_FLT1_IRQHandler
364+
DFSDM1_FLT2_IRQHandler
364365
COMP_IRQHandler
365366
LPTIM1_IRQHandler
366367
LPTIM2_IRQHandler

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.s

Lines changed: 16 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -2,10 +2,9 @@
22
******************************************************************************
33
* @file startup_stm32l476xx.s
44
* @author MCD Application Team
5-
* @version V1.0.0
6-
* @date 26-June-2015
7-
* @brief STM32L476xx devices vector table for Atollic
8-
* TrueSTUDIO toolchain.
5+
* @version V1.1.1
6+
* @date 29-April-2016
7+
* @brief STM32L476xx devices vector table GCC toolchain.
98
* This module performs:
109
* - Set the initial SP
1110
* - Set the initial PC == Reset_Handler,
@@ -18,7 +17,7 @@
1817
******************************************************************************
1918
* @attention
2019
*
21-
* <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
20+
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
2221
*
2322
* Redistribution and use in source and binary forms, with or without modification,
2423
* are permitted provided that the following conditions are met:
@@ -207,7 +206,7 @@ g_pfnVectors:
207206
.word USART3_IRQHandler
208207
.word EXTI15_10_IRQHandler
209208
.word RTC_Alarm_IRQHandler
210-
.word DFSDM3_IRQHandler
209+
.word DFSDM1_FLT3_IRQHandler
211210
.word TIM8_BRK_IRQHandler
212211
.word TIM8_UP_IRQHandler
213212
.word TIM8_TRG_COM_IRQHandler
@@ -226,9 +225,9 @@ g_pfnVectors:
226225
.word DMA2_Channel3_IRQHandler
227226
.word DMA2_Channel4_IRQHandler
228227
.word DMA2_Channel5_IRQHandler
229-
.word DFSDM0_IRQHandler
230-
.word DFSDM1_IRQHandler
231-
.word DFSDM2_IRQHandler
228+
.word DFSDM1_FLT0_IRQHandler
229+
.word DFSDM1_FLT1_IRQHandler
230+
.word DFSDM1_FLT2_IRQHandler
232231
.word COMP_IRQHandler
233232
.word LPTIM1_IRQHandler
234233
.word LPTIM2_IRQHandler
@@ -410,8 +409,8 @@ g_pfnVectors:
410409
.weak RTC_Alarm_IRQHandler
411410
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
412411

413-
.weak DFSDM3_IRQHandler
414-
.thumb_set DFSDM3_IRQHandler,Default_Handler
412+
.weak DFSDM1_FLT3_IRQHandler
413+
.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
415414

416415
.weak TIM8_BRK_IRQHandler
417416
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
@@ -467,14 +466,14 @@ g_pfnVectors:
467466
.weak DMA2_Channel5_IRQHandler
468467
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
469468

470-
.weak DFSDM0_IRQHandler
471-
.thumb_set DFSDM0_IRQHandler,Default_Handler
469+
.weak DFSDM1_FLT0_IRQHandler
470+
.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
472471

473-
.weak DFSDM1_IRQHandler
474-
.thumb_set DFSDM1_IRQHandler,Default_Handler
472+
.weak DFSDM1_FLT1_IRQHandler
473+
.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
475474

476-
.weak DFSDM2_IRQHandler
477-
.thumb_set DFSDM2_IRQHandler,Default_Handler
475+
.weak DFSDM1_FLT2_IRQHandler
476+
.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
478477

479478
.weak COMP_IRQHandler
480479
.thumb_set COMP_IRQHandler,Default_Handler

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/startup_stm32l476xx.s

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
1+
;/********************* COPYRIGHT(c) 2016 STMicroelectronics ********************
22
;* File Name : startup_stm32l476xx.s
33
;* Author : MCD Application Team
4-
;* Version : V1.0.0
5-
;* Date : 26-June-2015
4+
;* Version : V1.1.1
5+
;* Date : 29-April-2016
66
;* Description : STM32L476xx Ultra Low Power Devices vector
77
;* This module performs:
88
;* - Set the initial SP
@@ -129,7 +129,7 @@ __vector_table
129129
DCD USART3_IRQHandler ; USART3
130130
DCD EXTI15_10_IRQHandler ; External Line[15:10]
131131
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
132-
DCD DFSDM3_IRQHandler ; SD Filter 3 global Interrupt
132+
DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
133133
DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
134134
DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
135135
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
@@ -148,9 +148,9 @@ __vector_table
148148
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
149149
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
150150
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
151-
DCD DFSDM0_IRQHandler ; SD Filter 0 global Interrupt
152-
DCD DFSDM1_IRQHandler ; SD Filter 1 global Interrupt
153-
DCD DFSDM2_IRQHandler ; SD Filter 2 global Interrupt
151+
DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
152+
DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
153+
DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
154154
DCD COMP_IRQHandler ; COMP Interrupt
155155
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
156156
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
@@ -438,10 +438,10 @@ EXTI15_10_IRQHandler
438438
RTC_Alarm_IRQHandler
439439
B RTC_Alarm_IRQHandler
440440

441-
PUBWEAK DFSDM3_IRQHandler
441+
PUBWEAK DFSDM1_FLT3_IRQHandler
442442
SECTION .text:CODE:NOROOT:REORDER(1)
443-
DFSDM3_IRQHandler
444-
B DFSDM3_IRQHandler
443+
DFSDM1_FLT3_IRQHandler
444+
B DFSDM1_FLT3_IRQHandler
445445

446446
PUBWEAK TIM8_BRK_IRQHandler
447447
SECTION .text:CODE:NOROOT:REORDER(1)
@@ -533,20 +533,20 @@ DMA2_Channel4_IRQHandler
533533
DMA2_Channel5_IRQHandler
534534
B DMA2_Channel5_IRQHandler
535535

536-
PUBWEAK DFSDM0_IRQHandler
536+
PUBWEAK DFSDM1_FLT0_IRQHandler
537537
SECTION .text:CODE:NOROOT:REORDER(1)
538-
DFSDM0_IRQHandler
539-
B DFSDM0_IRQHandler
538+
DFSDM1_FLT0_IRQHandler
539+
B DFSDM1_FLT0_IRQHandler
540540

541-
PUBWEAK DFSDM1_IRQHandler
541+
PUBWEAK DFSDM1_FLT1_IRQHandler
542542
SECTION .text:CODE:NOROOT:REORDER(1)
543-
DFSDM1_IRQHandler
544-
B DFSDM1_IRQHandler
543+
DFSDM1_FLT1_IRQHandler
544+
B DFSDM1_FLT1_IRQHandler
545545

546-
PUBWEAK DFSDM2_IRQHandler
546+
PUBWEAK DFSDM1_FLT2_IRQHandler
547547
SECTION .text:CODE:NOROOT:REORDER(1)
548-
DFSDM2_IRQHandler
549-
B DFSDM2_IRQHandler
548+
DFSDM1_FLT2_IRQHandler
549+
B DFSDM1_FLT2_IRQHandler
550550

551551
PUBWEAK COMP_IRQHandler
552552
SECTION .text:CODE:NOROOT:REORDER(1)

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