Rename text region in ARM linker file for Renesas & Realtek boards

David Saada · David Saada · commit 84412d6493ae · 2018-08-08T14:56:58.000+03:00
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct
@@ -23,7 +23,7 @@ LOAD_TTB    __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
     { }                           ; Level-1 Translation Table for MMU
 }
 
-SFLASH MBED_APP_START MBED_APP_SIZE       ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE       ; load region size_region
 {
 #if (MBED_APP_START == 0x18000000)
   BOOT_LOADER_BEGIN MBED_APP_START FIXED
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
@@ -23,7 +23,7 @@ LOAD_TTB    __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
     { }                           ; Level-1 Translation Table for MMU
 }
 
-SFLASH MBED_APP_START MBED_APP_SIZE       ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE       ; load region size_region
 {
 #if (MBED_APP_START == 0x18000000)
   BOOT_LOADER_BEGIN MBED_APP_START FIXED
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_ARM_STD/VKRZA1H.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_ARM_STD/VKRZA1H.sct
@@ -16,7 +16,7 @@ LOAD_TTB    __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
     { }                           ; Level-1 Translation Table for MMU
 }
 
-SFLASH __ROM_BASE __ROM_SIZE       ; load region size_region
+LR_IROM1 __ROM_BASE __ROM_SIZE       ; load region size_region
 {
   VECTORS __VECTOR_BASE FIXED
   {
diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct
@@ -17,7 +17,7 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) {
     *rtl8195a_init*.o(.image2.validate.rodata*)
   }
 
-  ER_IRAM +0 FIXED {
+  LR_IROM1 +0 FIXED {
     *(.ARM.exidx)
     *(.init_array)
     *rtl8195a_crypto*.o (+RO)
@@ -55,7 +55,7 @@ LR_TCM 0x1FFF0000 0x10000 {
     }
 }
 
-LR_DRAM 0x30000000 0x200000 {
+LR_IROM1 0x30000000 0x200000 {
 
   ER_DRAM +0 FIXED {
     .ANY (+RO)

Original file line number	Diff line number	Diff line change
`@@ -23,7 +23,7 @@ LOAD_TTB __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM`
`23`	`23`	`{ } ; Level-1 Translation Table for MMU`
`24`	`24`	`}`
`25`	`25`
`26`		`-SFLASH MBED_APP_START MBED_APP_SIZE ; load region size_region`
	`26`	`+LR_IROM1 MBED_APP_START MBED_APP_SIZE ; load region size_region`
`27`	`27`	`{`
`28`	`28`	`#if (MBED_APP_START == 0x18000000)`
`29`	`29`	`BOOT_LOADER_BEGIN MBED_APP_START FIXED`
Original file line number	Diff line number	Diff line change
`@@ -16,7 +16,7 @@ LOAD_TTB __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM`
`16`	`16`	`{ } ; Level-1 Translation Table for MMU`
`17`	`17`	`}`
`18`	`18`
`19`		`-SFLASH __ROM_BASE __ROM_SIZE ; load region size_region`
	`19`	`+LR_IROM1 __ROM_BASE __ROM_SIZE ; load region size_region`
`20`	`20`	`{`
`21`	`21`	`VECTORS __VECTOR_BASE FIXED`
`22`	`22`	`{`
Original file line number	Diff line number	Diff line change
`@@ -17,7 +17,7 @@ LR_IRAM 0x10007000 (0x70000 - 0x7000) {`
`17`	`17`	`rtl8195a_init.o(.image2.validate.rodata*)`
`18`	`18`	`}`
`19`	`19`
`20`		`- ER_IRAM +0 FIXED {`
	`20`	`+ LR_IROM1 +0 FIXED {`
`21`	`21`	`*(.ARM.exidx)`
`22`	`22`	`*(.init_array)`
`23`	`23`	`rtl8195a_crypto.o (+RO)`
`@@ -55,7 +55,7 @@ LR_TCM 0x1FFF0000 0x10000 {`
`55`	`55`	`}`
`56`	`56`	`}`
`57`	`57`
`58`		`-LR_DRAM 0x30000000 0x200000 {`
	`58`	`+LR_IROM1 0x30000000 0x200000 {`
`59`	`59`
`60`	`60`	`ER_DRAM +0 FIXED {`
`61`	`61`	`.ANY (+RO)`