Skip to content

Commit 8594d8a

Browse files
committed
K64F: Adapt spi driver to the new HAL API, enable SPI
1 parent d14c50a commit 8594d8a

File tree

5 files changed

+525
-359
lines changed

5 files changed

+525
-359
lines changed

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralNames.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,12 @@ typedef enum {
130130
SPI_2 = 2,
131131
} SPIName;
132132

133+
/* Specify master/slave interfaces for testing purposes. */
134+
#define SPI_TEST_MASTER SPI_2
135+
#define SPI_TEST_SLAVE SPI_0
136+
#define SPI_TEST_MASTER_PIN(SPI_PIN) SPI_2##_##SPI_PIN
137+
#define SPI_TEST_SLAVE_PIN(SPI_PIN) SPI_0##_##SPI_PIN
138+
133139
#ifdef __cplusplus
134140
}
135141
#endif

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralPins.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ const PinMap PinMap_SPI_SCLK[] = {
158158
{NC , NC , 0}
159159
};
160160

161-
const PinMap PinMap_SPI_MOSI[] = {
161+
const PinMap PinMap_SPI_SOUT[] = {
162162
{PTD2 , SPI_0, 2},
163163
{PTE1 , SPI_1, 2},
164164
{PTE3 , SPI_1, 7},
@@ -170,7 +170,7 @@ const PinMap PinMap_SPI_MOSI[] = {
170170
{NC , NC , 0}
171171
};
172172

173-
const PinMap PinMap_SPI_MISO[] = {
173+
const PinMap PinMap_SPI_SIN[] = {
174174
{PTD3 , SPI_0, 2},
175175
{PTE1 , SPI_1, 7},
176176
{PTE3 , SPI_1, 2},

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PinNames.h

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -229,7 +229,7 @@ typedef enum {
229229
D13 = PTD1,
230230
D14 = PTE25,
231231
D15 = PTE24,
232-
232+
233233
I2C_SCL = D15,
234234
I2C_SDA = D14,
235235

@@ -243,6 +243,26 @@ typedef enum {
243243
DAC0_OUT = 0xFEFE, /* DAC does not have Pin Name in RM */
244244

245245
//SPI Pins configuration
246+
/* Note:
247+
This board does not provide SPI MOSI/MISO pins, instead we have SIN/SOUT pins which can be used
248+
as SPI MOSI/MISO lines depending on SPI operation mode(master or slave):
249+
master: SIN ---> MISO
250+
SOUT ---> MOSI
251+
slave: SIN ---> MOSI
252+
SOUT ---> MISO
253+
254+
SPI_0 interface represents SPI pins configuration for slave and SPI_2 respresents spi configuration
255+
for master.
256+
*/
257+
SPI_0_MOSI = PTD3,
258+
SPI_0_MISO = PTD2,
259+
SPI_0_SCK = PTD1,
260+
SPI_0_CS = PTD0,
261+
SPI_2_MOSI = PTB22,
262+
SPI_2_MISO = PTB23,
263+
SPI_2_SCK = PTB21,
264+
SPI_2_CS = PTB20,
265+
246266
SPI_MOSI = PTE3,
247267
SPI_MISO = PTE1,
248268
SPI_SCK = PTE2,

0 commit comments

Comments
 (0)