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Add implementation for CRC API
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‎targets/TARGET_Silicon_Labs/TARGET_EFM32/crc_api.c

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/***************************************************************************//**
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* @file crc_api.c
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2018 Silicon Labs, http://www.silabs.com</b>
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*******************************************************************************
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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#include "device.h"
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#include "clocking.h"
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#include <stdio.h>
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#if DEVICE_CRC
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#include "mbed_assert.h"
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#include "crc_api.h"
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#include "em_cmu.h"
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#if defined(GPCRC_PRESENT) && (GPCRC_COUNT > 0)
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#include "em_gpcrc.h"
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static bool revOutput = false;
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static uint32_t final_xor;
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bool hal_crc_is_supported(const crc_mbed_config_t *config)
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{
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//GPCRC supports any 16-bit poly, but only the CCITT 32-bit poly
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if (config == NULL) {
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return false;
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}
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if (config->width == 16) {
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return true;
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} else if (config->width == 32) {
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if (config->polynomial == POLY_32BIT_ANSI) {
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return true;
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} else {
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return false;
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}
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} else {
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return false;
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}
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}
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void hal_crc_compute_partial_start(const crc_mbed_config_t *config)
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{
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if (!hal_crc_is_supported(config)) {
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return;
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}
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CMU_ClockEnable(cmuClock_GPCRC, true);
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GPCRC_Reset(GPCRC);
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GPCRC_Init_TypeDef crc_init;
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crc_init.autoInit = false;
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crc_init.enable = true;
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crc_init.crcPoly = config->polynomial;
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// GPCRC operates on bit-reversed inputs and outputs vs the standard
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// defined by the mbed API. Emlib does the reversal on the poly, but
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// not on the initial value.
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if (config->width == 16) {
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crc_init.initValue = __RBIT(config->initial_xor) >> 16;
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} else {
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crc_init.initValue = __RBIT(config->initial_xor);
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}
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// GPCRC operates on bit-reversed inputs and outputs vs the standard
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// defined by the mbed API, so reflect_in/out needs to be negated.
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if (config->reflect_in) {
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crc_init.reverseByteOrder = false;
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crc_init.reverseBits = false;
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} else {
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crc_init.reverseByteOrder = true;
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crc_init.reverseBits = true;
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}
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// Disable byte mode to be able to run a faster U32 input version
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crc_init.enableByteMode = false;
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// GPCRC does not support hardware output bit-reversal, nor finalisation.
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// Since the mbed API does not pass the config struct when fetching the
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// CRC calculation result, we need to keep track of these locally.
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revOutput = config->reflect_out;
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final_xor = config->final_xor;
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GPCRC_Init(GPCRC, &crc_init);
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GPCRC_Start(GPCRC);
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}
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void hal_crc_compute_partial(const uint8_t *data, const size_t size)
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{
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if (data == NULL || size <= 0) {
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return;
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}
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if (((uint32_t)data & 0x3) != 0 || size < 4) {
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// Unaligned or very small input, run a bytewise CRC
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for (size_t i = 0; i < size; i++) {
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GPCRC_InputU8(GPCRC, data[i]);
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}
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} else {
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// Aligned input, run 32-bit inputs as long as possible to make go faster.
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size_t i = 0;
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for (; i < (size & (~0x3)); i+=4) {
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GPCRC_InputU32(GPCRC, *((uint32_t*)(&data[i])));
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}
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for (; i < size; i++) {
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GPCRC_InputU8(GPCRC, data[i]);
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}
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}
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}
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uint32_t hal_crc_get_result(void)
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{
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uint32_t result;
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// GPCRC operates on bit-reversed inputs and outputs vs the standard
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// defined by the mbed API.
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if (!revOutput) {
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result = GPCRC_DataReadBitReversed(GPCRC);
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} else {
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result = GPCRC_DataRead(GPCRC);
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}
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GPCRC_Enable(GPCRC, false);
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return result ^ final_xor;
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}
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#endif //GPCRC_PRESENT
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#endif //DEVICE_CRC

‎targets/targets.json

Lines changed: 6 additions & 6 deletions
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@@ -3236,7 +3236,7 @@
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},
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"EFM32PG_STK3401": {
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"inherits": ["EFM32PG1B100F256GM32"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"forced_reset_timeout": 2,
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"config": {
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"hf_clock_src": {
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},
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"EFR32MG1_BRD4150": {
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"inherits": ["EFR32MG1P132F256GM48"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"forced_reset_timeout": 2,
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"config": {
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"hf_clock_src": {
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},
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"TB_SENSE_1": {
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"inherits": ["EFR32MG1P233F256GM48"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "FLASH"],
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"forced_reset_timeout": 5,
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"config": {
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"hf_clock_src": {
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},
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"EFM32PG12_STK3402": {
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"inherits": ["EFM32PG12B500F1024GL125"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
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"device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
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"forced_reset_timeout": 2,
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"config": {
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"hf_clock_src": {
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"TB_SENSE_12": {
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"inherits": ["EFR32MG12P332F1024GL125"],
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"device_name": "EFR32MG12P332F1024GL125",
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
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"device_has": ["ANALOGIN", "CRC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
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"forced_reset_timeout": 5,
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"config": {
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"hf_clock_src": {
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"EFM32GG11_STK3701": {
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"inherits": ["EFM32GG11B820F2048GL192"],
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"device_name": "EFM32GG11B820F2048GL192",
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"device_has": ["ANALOGIN", "EMAC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
3496+
"device_has": ["ANALOGIN", "CRC", "EMAC", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LPTICKER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "USTICKER", "TRNG", "FLASH"],
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"forced_reset_timeout": 5,
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"config": {
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"hf_clock_src": {

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