NRF52840: Skip D0 - D3 pins during FPGA I2C testing

By default D0 - D3 pins are used for the bitbanged SPI com channel between mbed target and the FPGA-test-shield.
For some reason if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work on NRF52840.
Disable testing I2C pins on these pins until the drivers are fixed.

Author: mprse

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/PeripheralPins.c

@@ -73,10 +73,13 @@ const PinMap PinMap_I2C_testing[] = {
     {P0_31,  0, 0},
 
     {P1_0,  0, 0},
-    {P1_1,  0, 0},
-    {P1_2,  0, 0},
-    {P1_3,  0, 0},
-    {P1_4,  0, 0},
+// By default D0 - D3 pins are used for the bitbanged SPI com channel with the FPGA-test-shield.
+// For some reason if pins were used as GPIOs and then reconfigured to I2C pins the I2C com does not work.
+// Disable testing I2C pins on these pins until the drivers are fixed.
+//    {P1_1,  0, 0}, // D0
+//    {P1_2,  0, 0}, // D1
+//    {P1_3,  0, 0}, // D2
+//    {P1_4,  0, 0}, // D3
     {P1_5,  0, 0},
     {P1_6,  0, 0},
     {P1_7,  0, 0},