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scatter file - 32kb RAM, startup - removed heap, stack init
- clock set to 1 (external crystal)
1 parent 5dcd8ea commit 8df14ca

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3 files changed

+4
-52
lines changed

3 files changed

+4
-52
lines changed

libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
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.ANY (+RO)
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}
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; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
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; 0x4000 - 0xC0 = 0x3F40
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RW_IRAM1 0x1FFFE0C0 0x3F40 {
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; 0x8000 - 0xC0 = 0x7F40
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RW_IRAM1 0x1FFFE0C0 0x7F40 {
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.ANY (+RW +ZI)
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}
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}

libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s

Lines changed: 1 addition & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -12,28 +12,7 @@
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; *****************************************************************************/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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__initial_sp EQU 0x20006000 ; Top of RAM
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PRESERVE8
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THUMB
@@ -350,31 +329,4 @@ DefaultISR
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END

libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@
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#define DISABLE_WDOG 1
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#define CLOCK_SETUP 0
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#define CLOCK_SETUP 1
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/* Predefined clock setups
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0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
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Reference clock source for MCG module is the slow internal clock source 32.768kHz

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