Skip to content

Commit 8e25d2d

Browse files
author
Cruz Monrreal
authored
Merge pull request #7669 from SigmaDeltaTechnologiesInc/master
SDT64, 8195, 32620, 32625, 51822, 52832B added to targets
2 parents 871ee09 + 515e35e commit 8e25d2d

File tree

24 files changed

+4031
-1
lines changed

24 files changed

+4031
-1
lines changed
Lines changed: 137 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,137 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#ifndef MBED_PERIPHERALNAMES_H
17+
#define MBED_PERIPHERALNAMES_H
18+
19+
#include "cmsis.h"
20+
21+
#ifdef __cplusplus
22+
extern "C" {
23+
#endif
24+
25+
typedef enum {
26+
OSC32KCLK = 0,
27+
} RTCName;
28+
29+
typedef enum {
30+
UART_0 = 0,
31+
UART_1 = 1,
32+
UART_2 = 2,
33+
UART_3 = 3,
34+
UART_4 = 4,
35+
} UARTName;
36+
37+
#define STDIO_UART_TX USBTX
38+
#define STDIO_UART_RX USBRX
39+
#define STDIO_UART UART_0
40+
41+
typedef enum {
42+
I2C_0 = 0,
43+
I2C_1 = 1,
44+
I2C_2 = 2,
45+
} I2CName;
46+
47+
#define TPM_SHIFT 8
48+
typedef enum {
49+
PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
50+
PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
51+
PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
52+
PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
53+
PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
54+
PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
55+
PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
56+
PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
57+
PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
58+
PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
59+
PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
60+
PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
61+
PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
62+
PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
63+
PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
64+
PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
65+
PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
66+
PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
67+
PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
68+
PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
69+
PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
70+
PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
71+
PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
72+
PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
73+
PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
74+
PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
75+
PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
76+
PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
77+
PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
78+
PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
79+
PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
80+
PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
81+
} PWMName;
82+
83+
#define ADC_INSTANCE_SHIFT 8
84+
#define ADC_B_CHANNEL_SHIFT 5
85+
typedef enum {
86+
ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
87+
ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
88+
ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
89+
ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
90+
ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
91+
ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
92+
ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
93+
ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
94+
ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
95+
ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
96+
ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
97+
ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
98+
ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
99+
ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
100+
ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
101+
ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
102+
ADC1_SE4a = (1 << ADC_INSTANCE_SHIFT) | 4,
103+
ADC1_SE5a = (1 << ADC_INSTANCE_SHIFT) | 5,
104+
ADC1_SE6a = (1 << ADC_INSTANCE_SHIFT) | 6,
105+
ADC1_SE7a = (1 << ADC_INSTANCE_SHIFT) | 7,
106+
ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
107+
ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
108+
ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
109+
ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
110+
ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
111+
ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
112+
ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
113+
ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
114+
ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
115+
ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
116+
ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
117+
ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
118+
ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
119+
ADC1_SE23 = (1 << ADC_INSTANCE_SHIFT) | 23,
120+
} ADCName;
121+
122+
typedef enum {
123+
DAC_0 = 0
124+
} DACName;
125+
126+
127+
typedef enum {
128+
SPI_0 = 0,
129+
SPI_1 = 1,
130+
SPI_2 = 2,
131+
} SPIName;
132+
133+
#ifdef __cplusplus
134+
}
135+
#endif
136+
137+
#endif
Lines changed: 242 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,242 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#include "PeripheralPins.h"
18+
19+
/************RTC***************/
20+
const PinMap PinMap_RTC[] = {
21+
{NC, OSC32KCLK, 0},
22+
};
23+
24+
/************ADC***************/
25+
const PinMap PinMap_ADC[] = {
26+
{PTA17, ADC1_SE17, 0},
27+
{PTB0 , ADC0_SE8 , 0},
28+
{PTB1 , ADC0_SE9 , 0},
29+
{PTB2 , ADC0_SE12, 0},
30+
{PTB3 , ADC0_SE13, 0},
31+
{PTB6 , ADC1_SE12, 0},
32+
{PTB7 , ADC1_SE13, 0},
33+
{PTB10, ADC1_SE14, 0},
34+
{PTB11, ADC1_SE15, 0},
35+
{PTC0 , ADC0_SE14, 0},
36+
{PTC1 , ADC0_SE15, 0},
37+
{PTC2, ADC0_SE4b, 0},
38+
{PTC8, ADC1_SE4b, 0},
39+
{PTC9, ADC1_SE5b, 0},
40+
{PTC10, ADC1_SE6b, 0},
41+
{PTC11, ADC1_SE7b, 0},
42+
{PTD1, ADC0_SE5b, 0},
43+
{PTD5, ADC0_SE6b, 0},
44+
{PTD6, ADC0_SE7b, 0},
45+
{PTE0, ADC1_SE4a, 0},
46+
{PTE1, ADC1_SE5a, 0},
47+
{PTE2, ADC1_SE6a, 0},
48+
{PTE3, ADC1_SE7a, 0},
49+
//{PTE24, ADC0_SE17, 0}, //I2C pull up
50+
//{PTE25, ADC0_SE18, 0}, //I2C pull up
51+
{NC , NC , 0}
52+
};
53+
54+
/************DAC***************/
55+
const PinMap PinMap_DAC[] = {
56+
{DAC0_OUT, DAC_0, 0},
57+
{NC , NC , 0}
58+
};
59+
60+
/************I2C***************/
61+
const PinMap PinMap_I2C_SDA[] = {
62+
{PTE25, I2C_0, 5},
63+
{PTB1 , I2C_0, 2},
64+
{PTB3 , I2C_0, 2},
65+
{PTC11, I2C_1, 2},
66+
{PTA13, I2C_2, 5},
67+
{PTD3 , I2C_0, 7},
68+
{PTE0 , I2C_1, 6},
69+
{NC , NC , 0}
70+
};
71+
72+
const PinMap PinMap_I2C_SCL[] = {
73+
{PTE24, I2C_0, 5},
74+
{PTB0 , I2C_0, 2},
75+
{PTB2 , I2C_0, 2},
76+
{PTC10, I2C_1, 2},
77+
{PTA12, I2C_2, 5},
78+
{PTA14, I2C_2, 5},
79+
{PTD2 , I2C_0, 7},
80+
{PTE1 , I2C_1, 6},
81+
{NC , NC , 0}
82+
};
83+
84+
/************UART***************/
85+
const PinMap PinMap_UART_TX[] = {
86+
{PTB17, UART_0, 3},
87+
{PTC17, UART_3, 3},
88+
{PTD7 , UART_0, 3},
89+
{PTD3 , UART_2, 3},
90+
{PTC4 , UART_1, 3},
91+
{PTC15, UART_4, 3},
92+
{PTB11, UART_3, 3},
93+
{PTA14, UART_0, 3},
94+
{PTE24, UART_4, 3},
95+
{PTE4 , UART_3, 3},
96+
{PTE0, UART_1, 3},
97+
{NC , NC , 0}
98+
};
99+
100+
const PinMap PinMap_UART_RX[] = {
101+
{PTB16, UART_0, 3},
102+
{PTE1 , UART_1, 3},
103+
{PTE5 , UART_3, 3},
104+
{PTE25, UART_4, 3},
105+
{PTA15, UART_0, 3},
106+
{PTC16, UART_3, 3},
107+
{PTB10, UART_3, 3},
108+
{PTC3 , UART_1, 3},
109+
{PTC14, UART_4, 3},
110+
{PTD2 , UART_2, 3},
111+
{PTD6 , UART_0, 3},
112+
{NC , NC , 0}
113+
};
114+
115+
const PinMap PinMap_UART_CTS[] = {
116+
{PTB13, UART_3, 2},
117+
{PTE2 , UART_1, 3},
118+
{PTE6 , UART_3, 3},
119+
{PTE26, UART_4, 3},
120+
{PTA0 , UART_0, 2},
121+
{PTA16, UART_0, 3},
122+
{PTB3 , UART_0, 3},
123+
{PTB9 , UART_3, 3},
124+
{PTC2 , UART_1, 3},
125+
{PTC13, UART_4, 3},
126+
{PTC19, UART_3, 3},
127+
{PTD1 , UART_2, 3},
128+
{PTD5 , UART_0, 3},
129+
{NC , NC , 0}
130+
};
131+
132+
const PinMap PinMap_UART_RTS[] = {
133+
{PTB12, UART_3, 2},
134+
{PTE3 , UART_1, 3},
135+
{PTE7 , UART_3, 3},
136+
{PTE27, UART_4, 3},
137+
{PTA17, UART_0, 3},
138+
{PTB8 , UART_3, 3},
139+
{PTC1 , UART_1, 3},
140+
{PTC12, UART_4, 3},
141+
{PTC18, UART_3, 3},
142+
{PTD0 , UART_2, 3},
143+
{PTD4 , UART_0, 3},
144+
{PTA3 , UART_0, 2},
145+
{PTB2 , UART_0, 3},
146+
{NC , NC , 0}
147+
};
148+
149+
/************SPI***************/
150+
const PinMap PinMap_SPI_SCLK[] = {
151+
{PTD1 , SPI_0, 2},
152+
{PTE2 , SPI_1, 2},
153+
{PTA15, SPI_0, 2},
154+
{PTB11, SPI_1, 2},
155+
{PTB21, SPI_2, 2},
156+
{PTC5 , SPI_0, 2},
157+
{PTD5 , SPI_1, 7},
158+
{NC , NC , 0}
159+
};
160+
161+
const PinMap PinMap_SPI_MOSI[] = {
162+
{PTD2 , SPI_0, 2},
163+
{PTE1 , SPI_1, 2},
164+
{PTE3 , SPI_1, 7},
165+
{PTA16, SPI_0, 2},
166+
{PTB16, SPI_1, 2},
167+
{PTB22, SPI_2, 2},
168+
{PTC6 , SPI_0, 2},
169+
{PTD6 , SPI_1, 7},
170+
{NC , NC , 0}
171+
};
172+
173+
const PinMap PinMap_SPI_MISO[] = {
174+
{PTD3 , SPI_0, 2},
175+
{PTE1 , SPI_1, 7},
176+
{PTE3 , SPI_1, 2},
177+
{PTA17, SPI_0, 2},
178+
{PTB17, SPI_1, 2},
179+
{PTB23, SPI_2, 2},
180+
{PTC7 , SPI_0, 2},
181+
{PTD7 , SPI_1, 7},
182+
{NC , NC , 0}
183+
};
184+
185+
const PinMap PinMap_SPI_SSEL[] = {
186+
{PTD0 , SPI_0, 2},
187+
{PTE4 , SPI_1, 2},
188+
{PTA14, SPI_0, 2},
189+
{PTB10, SPI_1, 2},
190+
{PTB20, SPI_2, 2},
191+
{PTC4 , SPI_0, 2},
192+
{PTD4 , SPI_1, 7},
193+
{NC , NC , 0}
194+
};
195+
196+
/************PWM***************/
197+
const PinMap PinMap_PWM[] = {
198+
{PTA0 , PWM_6 , 3},
199+
{PTA1 , PWM_7 , 3},
200+
{PTA2 , PWM_8 , 3},
201+
{PTA3 , PWM_1 , 3},
202+
{PTA4 , PWM_2 , 3},
203+
{PTA5 , PWM_3 , 3},
204+
{PTA6 , PWM_4 , 3},
205+
{PTA7 , PWM_5 , 3},
206+
{PTA8 , PWM_9 , 3},
207+
{PTA9 , PWM_10, 3},
208+
{PTA10, PWM_17, 3},
209+
{PTA11, PWM_18, 3},
210+
{PTA12, PWM_9 , 3},
211+
{PTA13, PWM_10, 3},
212+
213+
{PTB0 , PWM_9 , 3},
214+
{PTB1 , PWM_10, 3},
215+
{PTB18, PWM_17, 3},
216+
{PTB19, PWM_18, 3},
217+
218+
{PTC1 , PWM_1 , 4},
219+
{PTC2 , PWM_2 , 4},
220+
{PTC3 , PWM_3 , 4},
221+
{PTC4 , PWM_4 , 4},
222+
{PTC5 , PWM_3 , 7},
223+
{PTC8 , PWM_29, 3},
224+
{PTC9 , PWM_30, 3},
225+
{PTC10, PWM_31, 3},
226+
{PTC11, PWM_32, 3},
227+
228+
{PTD0 , PWM_25, 4},
229+
{PTD1 , PWM_26, 4},
230+
{PTD2 , PWM_27, 4},
231+
{PTD3 , PWM_28, 4},
232+
{PTD4 , PWM_5 , 4},
233+
{PTD5 , PWM_6 , 4},
234+
{PTD6 , PWM_7 , 4},
235+
{PTD4 , PWM_5 , 4},
236+
{PTD7 , PWM_8 , 4},
237+
238+
{PTE5 , PWM_25, 6},
239+
{PTE6 , PWM_26, 6},
240+
241+
{NC , NC , 0}
242+
};

0 commit comments

Comments
 (0)