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[STM32L0] Change back AHBPresc table name
1 parent 6fa2506 commit 8e9e89f

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3 files changed

+6
-6
lines changed

3 files changed

+6
-6
lines changed

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@
146146
variable is updated automatically.
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149-
const uint8_t AHBPrescTable_2[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
149+
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150150
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
@@ -303,7 +303,7 @@ void SystemCoreClockUpdate (void)
303303
}
304304
/* Compute HCLK clock frequency --------------------------------------------*/
305305
/* Get HCLK prescaler */
306-
tmp = AHBPrescTable_2[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
306+
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
307307
/* HCLK clock frequency */
308308
SystemCoreClock >>= tmp;
309309
}

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L053R8/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@
146146
variable is updated automatically.
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149-
const uint8_t AHBPrescTable_2[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
149+
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150150
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
@@ -303,7 +303,7 @@ void SystemCoreClockUpdate (void)
303303
}
304304
/* Compute HCLK clock frequency --------------------------------------------*/
305305
/* Get HCLK prescaler */
306-
tmp = AHBPrescTable_2[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
306+
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
307307
/* HCLK clock frequency */
308308
SystemCoreClock >>= tmp;
309309
}

libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/system_stm32l0xx.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@
146146
variable is updated automatically.
147147
*/
148148
uint32_t SystemCoreClock = 32000000;
149-
const uint8_t AHBPrescTable_2[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
149+
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
150150
const uint8_t PLLMulTable_2[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
151151

152152
/**
@@ -303,7 +303,7 @@ void SystemCoreClockUpdate (void)
303303
}
304304
/* Compute HCLK clock frequency --------------------------------------------*/
305305
/* Get HCLK prescaler */
306-
tmp = AHBPrescTable_2[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
306+
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
307307
/* HCLK clock frequency */
308308
SystemCoreClock >>= tmp;
309309
}

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