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Commit 9046717

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author
Rohit Grover
committed
cleaning up code within Nordic's mbed HAL using astyle
1 parent d20ce63 commit 9046717

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12 files changed

+684
-628
lines changed

12 files changed

+684
-628
lines changed

‎libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/analogin_api.c

Lines changed: 18 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -29,45 +29,47 @@ static const PinMap PinMap_ADC[] = {
2929
{p4, ADC0_0, 32},
3030
{p5, ADC0_0, 64},
3131
{p6, ADC0_0, 128},
32-
{NC , NC , 0}
32+
{NC, NC, 0}
3333
};
3434

35-
void analogin_init(analogin_t *obj, PinName pin) {
36-
int analogInputPin=0;
37-
const PinMap *map = PinMap_ADC;
38-
35+
void analogin_init(analogin_t *obj, PinName pin)
36+
{
37+
int analogInputPin = 0;
38+
const PinMap *map = PinMap_ADC;
39+
3940
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); //(NRF_ADC_Type *)
4041
MBED_ASSERT(obj->adc != (ADCName)NC);
41-
42+
4243
while (map->pin != NC) {
43-
if (map->pin == pin){
44+
if (map->pin == pin) {
4445
analogInputPin = map->function;
4546
break;
4647
}
4748
map++;
4849
}
4950
obj->adc_pin = (uint8_t)analogInputPin;
50-
51+
5152
NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled;
5253
NRF_ADC->CONFIG = (ADC_CONFIG_RES_10bit << ADC_CONFIG_RES_Pos) |
53-
(ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling<< ADC_CONFIG_INPSEL_Pos) |
54+
(ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling << ADC_CONFIG_INPSEL_Pos) |
5455
(ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling << ADC_CONFIG_REFSEL_Pos) |
5556
(analogInputPin << ADC_CONFIG_PSEL_Pos) |
5657
(ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos);
5758
}
5859

59-
uint16_t analogin_read_u16(analogin_t *obj) {
60-
NRF_ADC->CONFIG &= ~ADC_CONFIG_PSEL_Msk;
61-
NRF_ADC->CONFIG |= obj->adc_pin << ADC_CONFIG_PSEL_Pos;
60+
uint16_t analogin_read_u16(analogin_t *obj)
61+
{
62+
NRF_ADC->CONFIG &= ~ADC_CONFIG_PSEL_Msk;
63+
NRF_ADC->CONFIG |= obj->adc_pin << ADC_CONFIG_PSEL_Pos;
6264
NRF_ADC->TASKS_START = 1;
63-
while ( ( (NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) >> ADC_BUSY_BUSY_Pos) == ADC_BUSY_BUSY_Busy)
64-
{
65+
while (((NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) >> ADC_BUSY_BUSY_Pos) == ADC_BUSY_BUSY_Busy) {
6566
}
66-
67+
6768
return (uint16_t)NRF_ADC->RESULT; // 10 bit
6869
}
6970

70-
float analogin_read(analogin_t *obj) {
71+
float analogin_read(analogin_t *obj)
72+
{
7173
uint16_t value = analogin_read_u16(obj);
7274
return (float)value * (1.0f / (float)ADC_RANGE);
7375
}

‎libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_api.c

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,12 @@
1717
#include "gpio_api.h"
1818
#include "pinmap.h"
1919

20-
void gpio_init(gpio_t *obj, PinName pin) {
20+
void gpio_init(gpio_t *obj, PinName pin)
21+
{
2122
obj->pin = pin;
22-
if (pin == (PinName)NC)
23+
if (pin == (PinName)NC) {
2324
return;
25+
}
2426

2527
obj->mask = (1ul << pin);
2628

@@ -30,14 +32,16 @@ void gpio_init(gpio_t *obj, PinName pin) {
3032
obj->reg_dir = &NRF_GPIO->DIR;
3133
}
3234

33-
void gpio_mode(gpio_t *obj, PinMode mode) {
35+
void gpio_mode(gpio_t *obj, PinMode mode)
36+
{
3437
pin_mode(obj->pin, mode);
3538
}
3639

37-
void gpio_dir(gpio_t *obj, PinDirection direction) {
40+
void gpio_dir(gpio_t *obj, PinDirection direction)
41+
{
3842
MBED_ASSERT(obj->pin != (PinName)NC);
3943
switch (direction) {
40-
case PIN_INPUT :
44+
case PIN_INPUT:
4145
NRF_GPIO->PIN_CNF[obj->pin] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
4246
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
4347
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
@@ -52,4 +56,3 @@ void gpio_dir(gpio_t *obj, PinDirection direction) {
5256
break;
5357
}
5458
}
55-

‎libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/gpio_irq_api.c

Lines changed: 65 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -23,103 +23,105 @@
2323

2424
static uint32_t channel_ids[CHANNEL_NUM] = {0}; //each pin will be given an id, if id is 0 the pin can be ignored.
2525
static uint8_t channel_enabled[CHANNEL_NUM] = {0};
26-
static uint32_t portRISE= 0;
27-
static uint32_t portFALL= 0;
26+
static uint32_t portRISE = 0;
27+
static uint32_t portFALL = 0;
2828
static gpio_irq_handler irq_handler;
2929

3030
#ifdef __cplusplus
3131
extern "C" {
32-
#endif
33-
void GPIOTE_IRQHandler(void){
34-
volatile uint32_t newVal = NRF_GPIO->IN;
35-
36-
if ( (NRF_GPIOTE->EVENTS_PORT != 0) && ( (NRF_GPIOTE->INTENSET & GPIOTE_INTENSET_PORT_Msk) != 0) ){
37-
NRF_GPIOTE->EVENTS_PORT = 0;
38-
39-
for(uint8_t i=0;i<31;i++){
40-
if(channel_ids[i]>0){
41-
if(channel_enabled[i]){
32+
#endif
33+
void GPIOTE_IRQHandler(void)
34+
{
35+
volatile uint32_t newVal = NRF_GPIO->IN;
36+
37+
if ((NRF_GPIOTE->EVENTS_PORT != 0) && ((NRF_GPIOTE->INTENSET & GPIOTE_INTENSET_PORT_Msk) != 0)) {
38+
NRF_GPIOTE->EVENTS_PORT = 0;
39+
40+
for (uint8_t i = 0; i<31; i++) {
41+
if (channel_ids[i]>0) {
42+
if (channel_enabled[i]) {
4243
if( ((newVal>>i)&1) && ( ( (NRF_GPIO->PIN_CNF[i] >>GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) != GPIO_PIN_CNF_SENSE_Low) && ( (portRISE>>i)&1) ){
43-
irq_handler(channel_ids[i], IRQ_RISE);
44-
}
45-
else if( ( ((newVal>>i)&1) == 0) && ( ( (NRF_GPIO->PIN_CNF[i] >>GPIO_PIN_CNF_SENSE_Pos)&GPIO_PIN_CNF_SENSE_Low) == GPIO_PIN_CNF_SENSE_Low) && ( (portFALL>>i)&1) ){
46-
irq_handler(channel_ids[i], IRQ_FALL);
47-
}
44+
irq_handler(channel_ids[i], IRQ_RISE);
45+
} else if ((((newVal >> i) & 1) == 0) &&
46+
(((NRF_GPIO->PIN_CNF[i] >> GPIO_PIN_CNF_SENSE_Pos) & GPIO_PIN_CNF_SENSE_Low) == GPIO_PIN_CNF_SENSE_Low) &&
47+
((portFALL >> i) & 1)) {
48+
irq_handler(channel_ids[i], IRQ_FALL);
49+
}
4850
}
49-
50-
if(NRF_GPIO->PIN_CNF[i] &GPIO_PIN_CNF_SENSE_Msk){
51+
52+
if (NRF_GPIO->PIN_CNF[i] & GPIO_PIN_CNF_SENSE_Msk) {
5153
NRF_GPIO->PIN_CNF[i] &= ~(GPIO_PIN_CNF_SENSE_Msk);
52-
53-
if(newVal>>i &1){
54-
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos) ;
55-
}
56-
else{
57-
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos) ;
54+
55+
if (newVal >> i & 1) {
56+
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
57+
} else {
58+
NRF_GPIO->PIN_CNF[i] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
5859
}
5960
}
6061
}
61-
}
62+
}
6263
}
6364
}
65+
6466
#ifdef __cplusplus
6567
}
66-
#endif
68+
#endif
6769

68-
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
70+
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
71+
{
6972
if (pin == NC) {
7073
return -1;
7174
}
72-
73-
irq_handler = handler;
74-
obj->ch = pin;
75-
NRF_GPIOTE->EVENTS_PORT = 0;
76-
channel_ids[pin] = id;
77-
channel_enabled[pin] = 1;
78-
NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set<<GPIOTE_INTENSET_PORT_Pos;
79-
75+
76+
irq_handler = handler;
77+
obj->ch = pin;
78+
NRF_GPIOTE->EVENTS_PORT = 0;
79+
channel_ids[pin] = id;
80+
channel_enabled[pin] = 1;
81+
NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set << GPIOTE_INTENSET_PORT_Pos;
82+
8083
NVIC_SetPriority(GPIOTE_IRQn, 3);
81-
NVIC_EnableIRQ (GPIOTE_IRQn);
84+
NVIC_EnableIRQ (GPIOTE_IRQn);
8285
return 0;
8386
}
8487

85-
void gpio_irq_free(gpio_irq_t *obj) {
88+
void gpio_irq_free(gpio_irq_t *obj)
89+
{
8690
channel_ids[obj->ch] = 0;
8791
}
8892

89-
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
93+
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
94+
{
9095
NRF_GPIO->PIN_CNF[obj->ch] &= ~(GPIO_PIN_CNF_SENSE_Msk);
91-
if(enable){
92-
if(event == IRQ_RISE){
93-
portRISE |= (1<<obj->ch);
96+
if (enable) {
97+
if (event == IRQ_RISE) {
98+
portRISE |= (1 << obj->ch);
99+
} else if (event == IRQ_FALL) {
100+
portFALL |= (1 << obj->ch);
94101
}
95-
else if(event == IRQ_FALL){
96-
portFALL |= (1<<obj->ch);
97-
}
98-
}
99-
else{
100-
if(event == IRQ_RISE){
101-
portRISE &= ~(1<<obj->ch);
102+
} else {
103+
if (event == IRQ_RISE) {
104+
portRISE &= ~(1 << obj->ch);
105+
} else if (event == IRQ_FALL) {
106+
portFALL &= ~(1 << obj->ch);
102107
}
103-
else if(event == IRQ_FALL){
104-
portFALL &= ~(1<<obj->ch);
105-
}
106-
107-
}
108-
109-
if( ( (portRISE>>obj->ch) & 1) || ( (portFALL>>obj->ch) & 1) ){
110-
if((NRF_GPIO->IN>>obj->ch)&1){
111-
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);// | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
112-
}
113-
else{
114-
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos) ;//| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
108+
}
109+
110+
if (((portRISE >> obj->ch) & 1) || ((portFALL >> obj->ch) & 1)) {
111+
if ((NRF_GPIO->IN >> obj->ch) & 1) {
112+
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos); // | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
113+
} else {
114+
NRF_GPIO->PIN_CNF[obj->ch] |= (GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos); //| (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos);
115115
}
116116
}
117117
}
118118

119-
void gpio_irq_enable(gpio_irq_t *obj) {
119+
void gpio_irq_enable(gpio_irq_t *obj)
120+
{
120121
channel_enabled[obj->ch] = 1;
121122
}
122123

123-
void gpio_irq_disable(gpio_irq_t *obj) {
124+
void gpio_irq_disable(gpio_irq_t *obj)
125+
{
124126
channel_enabled[obj->ch] = 0;
125127
}

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