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Merge pull request #1121 from Wiznet/master
Add WIZwiki-W7500
2 parents e775613 + 86a6703 commit 927c31a

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‎libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/TOOLCHAIN_ARM_MICRO/W7500.sct

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; *************************************************************
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; *** Scatter-Loading Description File generated by uVision ***
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; *************************************************************
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LR_IROM1 0x00000000 0x00020000 { ; load region size_region
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ER_IROM1 0x00000000 0x00020000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 0x20000000 0x00004000 { ; RW data
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.ANY (+RW +ZI)
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}
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}
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‎libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/TOOLCHAIN_ARM_MICRO/startup_W7500x.s

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;/**************************************************************************//**
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; * @file startup_CMSDK_CM0.s
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; * @brief CMSIS Cortex-M0 Core Device Startup File for
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; * Device CMSDK_CM0
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; * @version V3.01
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; * @date 06. March 2012
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; * @modify 29. April 2014 by WIZnet ; added WZTOE_HANDLER
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; * @note
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; * Copyright (C) 2012 ARM Limited. All rights reserved.
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; *
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; * @par
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; * ARM Limited (ARM) is supplying this software for use with Cortex-M
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * @par
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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;/*
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20004000 ; Top of RAM (16 KB for WIZwiki_W7500)
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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DCD SSP0_Handler ; 16+ 0: SSP 0 Handler
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DCD SSP1_Handler ; 16+ 1: SSP 1 Handler
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DCD UART0_Handler ; 16+ 2: UART 0 Handler
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DCD UART1_Handler ; 16+ 3: UART 1 Handler
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DCD UART2_Handler ; 16+ 4: UART 2 Handler
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DCD I2C0_Handler ; 16+ 5: I2C 0 Handler
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DCD I2C1_Handler ; 16+ 6: I2C 1 Handler
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DCD PORT0_Handler ; 16+ 7: GPIO Port 0 Combined Handler
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DCD PORT1_Handler ; 16+ 8: GPIO Port 1 Combined Handler
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DCD PORT2_Handler ; 16+ 9: GPIO Port 2 Combined Handler
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DCD PORT3_Handler ; 16+10: GPIO Port 3 Combined Handler
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DCD DMA_Handler ; 16+11: DMA Combined Handler
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DCD DUALTIMER0_Handler ; 16+12: Dual timer 0 handler
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DCD DUALTIMER1_Handler ; 16+13: Dual timer 1 handler
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DCD PWM0_Handler ; 16+14: PWM0 Handler
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DCD PWM1_Handler ; 16+15: PWM1 Handler
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DCD PWM2_Handler ; 16+16: PWM2 Handler
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DCD PWM3_Handler ; 16+17: PWM3 Handler
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DCD PWM4_Handler ; 16+18: PWM4 Handler
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DCD PWM5_Handler ; 16+19: PWM5 Handler
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DCD PWM6_Handler ; 16+20: PWM6 Handler
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DCD PWM7_Handler ; 16+21: PWM7 Handler
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DCD RTC_Handler ; 16+22: RTC Handler
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DCD ADC_Handler ; 16+23: ADC Handler
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DCD WZTOE_Handler ; 16+24: WZTOE_Handler
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DCD EXTI_Handler ; 16+25: EXTI_Handler
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT SSP0_Handler [WEAK]
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EXPORT SSP1_Handler [WEAK]
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EXPORT UART0_Handler [WEAK]
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EXPORT UART1_Handler [WEAK]
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EXPORT UART2_Handler [WEAK]
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EXPORT I2C0_Handler [WEAK]
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EXPORT I2C1_Handler [WEAK]
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EXPORT PORT0_Handler [WEAK]
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EXPORT PORT1_Handler [WEAK]
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EXPORT PORT2_Handler [WEAK]
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EXPORT PORT3_Handler [WEAK]
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EXPORT DMA_Handler [WEAK]
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EXPORT DUALTIMER0_Handler [WEAK]
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EXPORT DUALTIMER1_Handler [WEAK]
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EXPORT PWM0_Handler [WEAK]
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EXPORT PWM1_Handler [WEAK]
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EXPORT PWM2_Handler [WEAK]
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EXPORT PWM3_Handler [WEAK]
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EXPORT PWM4_Handler [WEAK]
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EXPORT PWM5_Handler [WEAK]
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EXPORT PWM6_Handler [WEAK]
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EXPORT PWM7_Handler [WEAK]
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EXPORT RTC_Handler [WEAK]
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EXPORT ADC_Handler [WEAK]
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EXPORT WZTOE_Handler [WEAK]
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EXPORT EXTI_Handler [WEAK]
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SSP0_Handler
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SSP1_Handler
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UART0_Handler
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UART1_Handler
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UART2_Handler
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I2C0_Handler
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I2C1_Handler
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PORT0_Handler
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PORT1_Handler
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PORT2_Handler
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PORT3_Handler
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DMA_Handler
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DUALTIMER0_Handler
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DUALTIMER1_Handler
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PWM0_Handler
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PWM1_Handler
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PWM2_Handler
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PWM3_Handler
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PWM4_Handler
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PWM5_Handler
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PWM6_Handler
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PWM7_Handler
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RTC_Handler
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ADC_Handler
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WZTOE_Handler
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EXTI_Handler
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B .
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ENDP
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ALIGN
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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END

‎libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/TOOLCHAIN_ARM_MICRO/sys.cpp

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/* mbed Microcontroller Library - stackheap
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* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
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*
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* Setup a fixed single stack/heap memory model,
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* between the top of the RW/ZI region and the stackpointer
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <rt_misc.h>
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#include <stdint.h>
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
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struct __initial_stackheap r;
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r.heap_base = zi_limit;
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r.heap_limit = sp_limit;
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return r;
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}
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#ifdef __cplusplus
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}
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#endif

‎libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/TOOLCHAIN_ARM_STD/W7500.sct

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; *************************************************************
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; *** Scatter-Loading Description File generated by uVision ***
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; *************************************************************
4+
5+
LR_IROM1 0x00000000 0x00020000 { ; load region size_region
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ER_IROM1 0x00000000 0x00020000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 0x20000000 0x00004000 { ; RW data
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.ANY (+RW +ZI)
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}
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}
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