Added required changes outside of TARGET_Cypress tree:

1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
   This is because on PSoC 6 hardware resources are shared between both cores
   and we have to make sure that the other core is not already using a particular resource.
   This mechanism is based on interprocessor communication taht cannot be handled iside of
   critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
   can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
   in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
   build process.

Author: lrusinowicz

drivers/Timer.cpp

@@ -23,11 +23,13 @@ namespace mbed {
 
 Timer::Timer() : _running(), _start(), _time(), _ticker_data(get_us_ticker_data()), _lock_deepsleep(true)
 {
+    (void)ticker_read_us(_ticker_data); // Make sure h/w timer is initialized in non-critical context.
     reset();
 }
 
 Timer::Timer(const ticker_data_t *data) : _running(), _start(), _time(), _ticker_data(data), _lock_deepsleep(true)
 {
+    (void)ticker_read_us(_ticker_data); // Make sure h/w timer is initialized in non-critical context.
     reset();
 #if DEVICE_LPTICKER
     _lock_deepsleep = (data != get_lp_ticker_data());

features/storage/nvstore/mbed_lib.json

@@ -27,5 +27,19 @@
             "macro_name": "NVSTORE_AREA_2_SIZE",
             "help": "Area 2 size"
         }
+	},
+    "target_overrides": {
+        "FUTURE_SEQUANA": {
+            "area_1_address": "0x100F8000",
+            "area_1_size": 16384,
+            "area_2_address": "0x100FC000",
+            "area_2_size": 16384
+        },
+		"FUTURE_SEQUANA_M0": {
+            "area_1_address": "0x10078000",
+            "area_1_size": 16384,
+            "area_2_address": "0x1007C000",
+            "area_2_size": 16384
+        }
     }
 }

targets/targets.json

@@ -4533,5 +4533,82 @@
         "detect_code": ["7016"],
         "release_versions": ["5"],
         "bootloader_supported": true
+    },
+    "MCU_PSOC6": {
+        "inherits": ["Target"],
+        "default_toolchain": "GCC_ARM",
+        "supported_toolchains": ["GCC_ARM", "IAR", "ARM"],
+        "core": "Cortex-M4F",
+        "OUTPUT_EXT": "hex",
+        "device_has": ["USTICKER", "INTERRUPTIN", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "PORTIN", "PORTOUT", "PORTINOUT", "RTC", "PWMOUT", "ANALOGIN", "ANALOGOUT", "I2C", "I2C_ASYNCH", "SPI", "SPI_ASYNCH", "STDIO_MESSAGES", "LPTICKER", "SLEEP", "FLASH" ],
+        "release_versions": ["5"],
+        "extra_labels": ["Cypress", "PSOC6"]
+    },
+    "MCU_PSOC6_M0": {
+        "inherits": ["MCU_PSOC6"],
+        "core": "Cortex-M0+",
+        "macros": ["MCU_PSOC6_M0"]
+    },
+    "MCU_PSOC6_M4": {
+        "inherits": ["MCU_PSOC6"],
+        "macros": ["MCU_PSOC6_M4"]
+    },
+    "FUTURE_SEQUANA_M0": {
+        "inherits": ["MCU_PSOC6_M0"],
+        "supported_form_factors": ["ARDUINO"],
+        "device_name": "CY8C6347BZI-BLD53M0+",
+        "extra_labels_add": ["CY8C63XX", "FUTURE_SEQUANA"],
+        "macros_add": ["CY8C6347BZI_BLD53"],
+        "detect_code": ["6000"],
+        "post_binary_hook": {
+            "function": "PSOC6Code.complete"
+        },
+        "config": {
+            "system-clock": {
+                "help": "Desired frequency of main clock (Hz)",
+                "value": "100000000UL",
+                "macro_name": "CY_CLK_HFCLK0_FREQ_HZ"
+            },
+            "peri-clock": {
+                "help": "Desired frequency of peripheral clock (Hz)",
+                "value": "50000000UL",
+                "macro_name": "CY_CLK_PERICLK_FREQ_HZ"
+            },
+            "m0-clock": {
+                "help": "Desired frequency of M0+ core clock (Hz)",
+                "value": "50000000UL",
+                "macro_name": "CY_CLK_SLOWCLK_FREQ_HZ"
+            }
+        }
+    },
+    "FUTURE_SEQUANA": {
+        "inherits": ["MCU_PSOC6_M4"],
+        "sub_target": "FUTURE_SEQUANA_M0",
+        "supported_form_factors": ["ARDUINO"],
+        "device_name": "CY8C6347BZI-BLD53M4",
+        "extra_labels_add": ["CY8C63XX", "CORDIO"],
+        "macros_add": ["CY8C6347BZI_BLD53"],
+        "detect_code": ["6000"],
+        "m0_core_img": "psoc63_m0_default_1.01.hex",
+        "post_binary_hook": {
+            "function": "PSOC6Code.complete"
+        },
+        "config": {
+            "system-clock": {
+                "help": "Desired frequency of main clock (Hz)",
+                "value": "100000000UL",
+                "macro_name": "CY_CLK_HFCLK0_FREQ_HZ"
+            },
+            "peri-clock": {
+                "help": "Desired frequency of peripheral clock (Hz)",
+                "value": "50000000UL",
+                "macro_name": "CY_CLK_PERICLK_FREQ_HZ"
+            },
+            "m0-clock": {
+                "help": "Desired frequency of M0+ core clock (Hz)",
+                "value": "50000000UL",
+                "macro_name": "CY_CLK_SLOWCLK_FREQ_HZ"
+            }
+        }
     }
 }

tools/export/__init__.py

@@ -24,6 +24,8 @@
 import copy
 from shutil import rmtree, copyfile
 import zipfile
+import inspect
+from inspect import getmro
 
 from ..resources import Resources, FileType, FileRef
 from ..config import ALLOWED_FEATURES
@@ -129,6 +131,62 @@ def mcu_ide_matrix(verbose_html=False):
     return result
 
 
+def get_target_exporter(target, toolchain):
+    """Locate target-specyfic exporter function.
+    Positional Arguments:
+    target - the target object for inspection
+    toolchain - the toolchain object for inspection
+    """
+    # If there's no hook, simply return
+    target_obj = toolchain.config.target
+    try:
+        hook_data = target_obj.post_binary_hook
+    except AttributeError:
+        return None
+    # A hook was found. The hook's name is in the format
+    # "classname.functionname"
+    temp = hook_data["export_function"].split(".")
+    if len(temp) != 2:
+        raise HookError(
+            ("Invalid format for hook '%s' in target '%s'"
+             % (hook_data["export_function"], target_obj.name)) +
+            " (must be 'class_name.function_name')")
+    class_name, function_name = temp
+    # "class_name" must refer to a class in tools/targets module, so check if the
+    # class exists
+    from .. import targets
+    from targets import HookError
+    mdata = dict([(m[0], m[1]) for m in
+                     inspect.getmembers(sys.modules[targets.__name__])])
+
+    if class_name not in mdata or \
+       not inspect.isclass(mdata[class_name]):
+        print (mdata)
+        raise HookError(
+            ("Class '%s' required by '%s' in target '%s'"
+             % (class_name, hook_data["export_function"], target_obj.name)) +
+            " not found in targets.py")
+    # "function_name" must refer to a static function inside class
+    # "class_name"
+    cls = mdata[class_name]
+    if (not hasattr(cls, function_name)) or \
+       (not inspect.isfunction(getattr(cls, function_name))):
+        raise HookError(
+            ("Static function '%s' " % function_name) +
+            ("required by '%s' " % hook_data["export_function"]) +
+            ("in target '%s' " % target_obj.name) +
+            ("not found in class '%s'" %  class_name))
+    # Check if the hook specification also has toolchain restrictions
+    toolchain_restrictions = set(hook_data.get("toolchains", []))
+    toolchain_labels = set(c.__name__ for c in getmro(toolchain.__class__))
+    if toolchain_restrictions and \
+       not toolchain_labels.intersection(toolchain_restrictions):
+        return None
+    # Finally, get the requested function
+    print("Found function '%s' in class '%s'."% (function_name, class_name))
+    return getattr(cls, function_name)
+
+
 def get_exporter_toolchain(ide):
     """ Return the exporter class and the toolchain string as a tuple
 
@@ -158,6 +216,9 @@ def generate_project_files(resources, export_path, target, name, toolchain, ide,
     exporter_cls, _ = get_exporter_toolchain(ide)
     exporter = exporter_cls(target, export_path, name, toolchain,
                             extra_symbols=macros, resources=resources)
+    # Locate target-specyfic exporter if specified.
+    exporter.TARGET_EXPORTER = get_target_exporter(target, toolchain)
+
     exporter.generate()
     files = exporter.generated_files
     return files, exporter

tools/export/codeblocks/__init__.py

@@ -35,7 +35,8 @@ class CodeBlocks(GccArm):
     PREPROCESS_ASM = False
 
     POST_BINARY_WHITELIST = set([
-        "NCS36510TargetCode.ncs36510_addfib"
+        "NCS36510TargetCode.ncs36510_addfib",
+        "PSOC6Code.complete"
     ])
 
     @staticmethod
@@ -132,7 +133,9 @@ def generate(self):
             'NRF51_DK_LEGACY': 'board/nordic_nrf51_dk.cfg',
             'NRF51_DK_BOOT': 'board/nordic_nrf51_dk.cfg',
             'NRF51_DK_OTA': 'board/nordic_nrf51_dk.cfg',
-            'NRF51_DK': 'board/nordic_nrf51_dk.cfg'
+            'NRF51_DK': 'board/nordic_nrf51_dk.cfg',
+            'FUTURE_SEQUANA': 'board/cy8ckit_062_ble.cfg',
+            'FUTURE_SEQUANA_M0': 'board/cy8ckit_062_ble.cfg'
             }
 
         if self.target in openocd_board:
@@ -162,7 +165,7 @@ def generate(self):
             if ignorefiles:
                 with open(self.gen_file_dest('.mbedignore'), 'a') as f:
                     for fi in ignorefiles:
-                        f.write("%s\n" % fi)                
+                        f.write("%s\n" % fi)
 
         # finally, generate the project file
         super(CodeBlocks, self).generate()

tools/export/exporters.py

@@ -53,7 +53,7 @@ class Exporter(object):
     TARGETS = set()
     TOOLCHAIN = None
     CLEAN_FILES = ("GettingStarted.html",)
-
+    TARGET_EXPORTER = None
 
     def __init__(self, target, export_dir, project_name, toolchain,
                  extra_symbols=None, resources=None):

tools/export/gnuarmeclipse/__init__.py

@@ -16,7 +16,7 @@
 
 Title: GNU ARM Eclipse (http://gnuarmeclipse.github.io) exporter.
 
-Description: Creates a managed build project that can be imported by 
+Description: Creates a managed build project that can be imported by
 the GNU ARM Eclipse plug-ins.
 
 Author: Liviu Ionescu <[email protected]>
@@ -64,7 +64,8 @@ def id(self):
     "TEENSY3_1Code.binary_hook",
     "MCU_NRF51Code.binary_hook",
     "LPCTargetCode.lpc_patch",
-    "LPC4088Code.binary_hook"
+    "LPC4088Code.binary_hook",
+    "PSOC6Code.complete"
 ])
 
 class GNUARMEclipse(Exporter):
@@ -249,9 +250,9 @@ def build(project_name, log_name="build_log.txt", cleanup=True):
         Headless build an Eclipse project.
 
         The following steps are performed:
-        - a temporary workspace is created, 
+        - a temporary workspace is created,
         - the project is imported,
-        - a clean build of all configurations is performed and 
+        - a clean build of all configurations is performed and
         - the temporary workspace is removed.
 
         The build results are in the Debug & Release folders.
@@ -354,7 +355,7 @@ def compute_exclusions(self):
         The steps are:
         - get the list of source folders, as dirname(source_file)
         - compute the top folders (subfolders of the project folder)
-        - iterate all subfolders and add them to a tree, with all 
+        - iterate all subfolders and add them to a tree, with all
         nodes markes as 'not used'
         - iterate the source folders and mark them as 'used' in the
         tree, including all intermediate nodes
@@ -401,8 +402,8 @@ def process_options(self, opts, flags_in):
 
         Once identified, the options are removed from the command lines.
 
-        The options that were not identified are options that do not 
-        have CDT equivalents and will be passed in the 'Other options' 
+        The options that were not identified are options that do not
+        have CDT equivalents and will be passed in the 'Other options'
         categories.
 
         Although this process does not have a very complicated logic,

tools/export/iar/iar_definitions.json

@@ -320,5 +320,20 @@
     },
     "STM32L432KC": {
         "OGChipSelectEditMenu": "STM32L432KC\tST STM32L432KC"
+    },
+    "CY8C6347BZI-BLD53M0+": {
+        "OGChipSelectEditMenu": "CY8C6347BZI-BLD53M0+\tCypress CY8C6347BZI-BLD53M0+",
+        "CoreVariant": 35,
+        "GFPUCoreSlave": 35,
+        "GBECoreSlave": 35,
+        "GFPUCoreSlave2": 35
+    },
+    "CY8C6347BZI-BLD53M4": {
+        "OGChipSelectEditMenu": "CY8C6347BZI-BLD53M4\tCypress CY8C6347BZI-BLD53M4",
+        "CoreVariant": 39,
+        "GFPUCoreSlave": 39,
+        "GBECoreSlave": 39,
+        "FPU2": 6,
+        "GFPUCoreSlave2": 39
     }
 }

tools/export/makefile/__init__.py

@@ -54,7 +54,8 @@ class Makefile(Exporter):
         "MCU_NRF51Code.binary_hook",
         "TEENSY3_1Code.binary_hook",
         "LPCTargetCode.lpc_patch",
-        "LPC4088Code.binary_hook"
+        "LPC4088Code.binary_hook",
+        "PSOC6Code.complete"
     ])
 
     @classmethod
@@ -145,6 +146,12 @@ def generate(self):
                 new_asm_flags.append(flag)
         ctx['asm_flags'] = new_asm_flags
 
+        # If there is a target-specific exporter function, call it now.
+        if self.TARGET_EXPORTER:
+            print ("Calling target exporter...")
+            self.TARGET_EXPORTER(self, ctx)
+
+        # Generate makefiles.
         for templatefile in \
             ['makefile/%s_%s.tmpl' % (self.TEMPLATE,
                                       self.target.lower())] + \
@@ -154,6 +161,7 @@ def generate(self):
             ['makefile/%s.tmpl' % self.TEMPLATE]:
             try:
                 self.gen_file(templatefile, ctx, 'Makefile')
+                print("Generated Makefile from %s"%templatefile)
                 break
             except TemplateNotFound:
                 pass