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Enable IAR and GCC_ARM compiler for CM3DS MPS2
1. Add startup code and linker script for IAR and GCC_ARM compilers. 2. Enable IAR and GCC_ARM compilers in targets.json. Change-Id: I742a89ae73a4e5ede980a8af0821c3f0e5a461ef Signed-off-by: Mate Toth-Pal <[email protected]>
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targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct

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*************************************************************
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*/
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LR_IROM1 0x00000000 0x00400000 { ; load region size_region
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ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
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LR_IROM1 0x00000000 0x00040000 { ; load region size_region
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ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM
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RW_IRAM1 (0x20000000+0x140) (0x400000-0x140) { ; RW data
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; This is a bit more than is necessary based on the number of
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; exception handlers.
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RW_IRAM1 (0x20000000+0x140) (0x20000-0x140) { ; RW data
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.ANY (+RW +ZI)
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}
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}
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/*
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* MPS2 CMSIS Library
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*/
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/*
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* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* This file is derivative of CMSIS V5.00 gcc_arm.ld
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*/
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/* Linker script for mbed CM3DS on MPS2 */
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/* Linker script to configure memory regions. */
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/* The length of the VECTORS region is a bit larger than
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* is necessary based on the number of exception handlers.
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*/
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MEMORY
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{
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VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020000
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}
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/* Linker script to place sections and symbol values. Should be used together
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* with other linker script that defines memory regions FLASH and RAM.
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* It references following symbols, which must be defined in code:
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* Reset_Handler : Entry of reset handler
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*
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* It defines following symbols, which code can use without definition:
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* __exidx_start
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* __exidx_end
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* __etext
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* __data_start__
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* __preinit_array_start
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* __preinit_array_end
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* __init_array_start
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* __init_array_end
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* __fini_array_start
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* __fini_array_end
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* __data_end__
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* __bss_start__
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* __bss_end__
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* __end__
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* end
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* __HeapLimit
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* __StackLimit
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* __StackTop
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* __stack
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*/
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ENTRY(Reset_Handler)
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HEAP_SIZE = 0x4000;
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STACK_SIZE = 0x1000;
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/* Size of the vector table in SRAM */
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M_VECTOR_RAM_SIZE = 0x140;
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SECTIONS
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{
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.isr_vector :
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{
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__vector_table = .;
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KEEP(*(.vector_table))
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. = ALIGN(4);
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} > VECTORS
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.text :
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{
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. = ALIGN(4);
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*(.text*)
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KEEP(*(.init))
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KEEP(*(.fini))
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/* .ctors */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* .dtors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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__exidx_end = .;
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.interrupts_ram :
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{
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. = ALIGN(4);
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__VECTOR_RAM__ = .;
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__interrupts_ram_start__ = .; /* Create a global symbol at data start */
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. += M_VECTOR_RAM_SIZE;
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. = ALIGN(4);
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__interrupts_ram_end__ = .; /* Define a global symbol at data end */
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} > RAM
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.data :
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{
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PROVIDE(__etext = LOADADDR(.data));
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. = ALIGN(4);
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__data_start__ = .;
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*(vtable)
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*(.data)
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*(.data*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM AT > FLASH
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.uninitialized (NOLOAD):
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{
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. = ALIGN(32);
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__uninitialized_start = .;
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*(.uninitialized)
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KEEP(*(.keep.uninitialized))
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. = ALIGN(32);
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__uninitialized_end = .;
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} > RAM
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.bss :
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{
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. = ALIGN(4);
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__START_BSS = .;
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__bss_start__ = .;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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__END_BSS = .;
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} > RAM
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bss_size = __bss_end__ - __bss_start__;
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.heap :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > RAM
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(RAM) + LENGTH(RAM);
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__StackLimit = __StackTop - STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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} /* End of sections */

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