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| 1 | +/* mbed Microcontroller Library |
| 2 | + * Copyright (c) 2020 ARM Limited |
| 3 | + * |
| 4 | + * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + * you may not use this file except in compliance with the License. |
| 6 | + * You may obtain a copy of the License at |
| 7 | + * |
| 8 | + * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | + * |
| 10 | + * Unless required by applicable law or agreed to in writing, software |
| 11 | + * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + * See the License for the specific language governing permissions and |
| 14 | + * limitations under the License. |
| 15 | + */ |
| 16 | +#include "watchdog_api.h" |
| 17 | + |
| 18 | +#if DEVICE_WATCHDOG |
| 19 | + |
| 20 | +#include "reset_reason_api.h" |
| 21 | +#include "fsl_rtwdog.h" |
| 22 | +#include "fsl_clock.h" |
| 23 | +#include "platform/mbed_wait_api.h" |
| 24 | + |
| 25 | +// Platform specific watchdog definitions |
| 26 | +#define LPO_CLOCK_FREQUENCY 32768 |
| 27 | +#define MAX_TIMEOUT 0xFFFFUL |
| 28 | +#define DELAY_TIME 100000U |
| 29 | + |
| 30 | +// Number of decrements in the timeout register per millisecond |
| 31 | +#define TICKS_PER_MS ((LPO_CLOCK_FREQUENCY) / 1000) |
| 32 | + |
| 33 | +// Maximum timeout that can be specified in milliseconds |
| 34 | +#define MAX_TIMEOUT_MS ((MAX_TIMEOUT) / (TICKS_PER_MS)) |
| 35 | + |
| 36 | +watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) |
| 37 | +{ |
| 38 | + uint32_t temp; |
| 39 | + rtwdog_config_t cfg; |
| 40 | + |
| 41 | + /* When system is boot up, WDOG32 is disabled. We must wait for at least 2.5 |
| 42 | + * periods of wdog32 clock to reconfigure wodg32. So Delay a while to wait for |
| 43 | + * the previous configuration taking effect. */ |
| 44 | + for (temp = 0; temp < DELAY_TIME; temp++) |
| 45 | + { |
| 46 | + __NOP(); |
| 47 | + } |
| 48 | + |
| 49 | + RTWDOG_GetDefaultConfig(&cfg); |
| 50 | + |
| 51 | + cfg.workMode.enableStop = true; |
| 52 | + cfg.workMode.enableDebug = true; |
| 53 | + cfg.timeoutValue = (TICKS_PER_MS * config->timeout_ms); |
| 54 | + |
| 55 | + RTWDOG_Init(RTWDOG, &cfg); |
| 56 | + |
| 57 | + return WATCHDOG_STATUS_OK; |
| 58 | +} |
| 59 | + |
| 60 | +void hal_watchdog_kick(void) |
| 61 | +{ |
| 62 | + RTWDOG_Refresh(RTWDOG); |
| 63 | +} |
| 64 | + |
| 65 | +watchdog_status_t hal_watchdog_stop(void) |
| 66 | +{ |
| 67 | + RTWDOG_Deinit(RTWDOG); |
| 68 | + |
| 69 | + return WATCHDOG_STATUS_OK; |
| 70 | +} |
| 71 | + |
| 72 | +uint32_t hal_watchdog_get_reload_value(void) |
| 73 | +{ |
| 74 | + const uint32_t timeout = RTWDOG->TOVAL; |
| 75 | + |
| 76 | + return (timeout / TICKS_PER_MS); |
| 77 | +} |
| 78 | + |
| 79 | +watchdog_features_t hal_watchdog_get_platform_features(void) |
| 80 | +{ |
| 81 | + watchdog_features_t features; |
| 82 | + features.max_timeout = MAX_TIMEOUT_MS; |
| 83 | + features.update_config = true; |
| 84 | + features.disable_watchdog = true; |
| 85 | + features.clock_typical_frequency = 32000; |
| 86 | + features.clock_max_frequency = 32768; |
| 87 | + |
| 88 | + return features; |
| 89 | +} |
| 90 | + |
| 91 | +#endif // DEVICE_WATCHDOG |
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