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[STM32] HAL F2: I2C fix btf / rxne cases
Applying the same fix as in L1 and F4
1 parent 85a2f7a commit a0722b1

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+28
-34
lines changed

1 file changed

+28
-34
lines changed

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c

Lines changed: 28 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -3925,6 +3925,7 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
39253925
*/
39263926
static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39273927
{
3928+
39283929
if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
39293930
{
39303931
uint32_t tmp = 0U;
@@ -3938,34 +3939,24 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39383939
}
39393940
else if((tmp == 2U) || (tmp == 3U))
39403941
{
3941-
if(hi2c->XferOptions != I2C_NEXT_FRAME)
3942-
{
3943-
/* Disable Acknowledge */
3944-
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3945-
3946-
/* Enable Pos */
3947-
hi2c->Instance->CR1 |= I2C_CR1_POS;
3948-
}
3949-
else
3950-
{
3951-
/* Enable Acknowledge */
3952-
hi2c->Instance->CR1 |= I2C_CR1_ACK;
3953-
}
3942+
/* Disable Acknowledge */
3943+
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3944+
3945+
/* Enable Pos */
3946+
hi2c->Instance->CR1 |= I2C_CR1_POS;
39543947

39553948
/* Disable BUF interrupt */
39563949
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
39573950
}
39583951
else
39593952
{
3960-
if(hi2c->XferOptions != I2C_NEXT_FRAME)
3961-
{
3962-
/* Disable Acknowledge */
3963-
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3964-
}
3965-
else
3953+
/* Disable Acknowledge */
3954+
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3955+
3956+
if(hi2c->XferOptions == I2C_NEXT_FRAME)
39663957
{
3967-
/* Enable Acknowledge */
3968-
hi2c->Instance->CR1 |= I2C_CR1_ACK;
3958+
/* Enable Pos */
3959+
hi2c->Instance->CR1 |= I2C_CR1_POS;
39693960
}
39703961

39713962
/* Disable EVT, BUF and ERR interrupt */
@@ -3975,17 +3966,17 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39753966
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
39763967
hi2c->XferCount--;
39773968

3969+
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
3970+
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
39783971
hi2c->State = HAL_I2C_STATE_READY;
39793972

39803973
if(hi2c->Mode == HAL_I2C_MODE_MEM)
39813974
{
3982-
hi2c->PreviousState = I2C_STATE_NONE;
39833975
hi2c->Mode = HAL_I2C_MODE_NONE;
39843976
HAL_I2C_MemRxCpltCallback(hi2c);
39853977
}
39863978
else
39873979
{
3988-
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
39893980
hi2c->Mode = HAL_I2C_MODE_NONE;
39903981
HAL_I2C_MasterRxCpltCallback(hi2c);
39913982
}
@@ -4003,6 +3994,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
40033994
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40043995
{
40053996
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
3997+
uint32_t tmp;
40063998
uint32_t CurrentXferOptions = hi2c->XferOptions;
40073999

40084000
if(hi2c->XferCount == 3U)
@@ -4022,19 +4014,21 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40224014
/* Prepare next transfer or stop current transfer */
40234015
if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
40244016
{
4025-
if(CurrentXferOptions != I2C_NEXT_FRAME)
4026-
{
4027-
/* Disable Acknowledge */
4028-
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4029-
}
4030-
else
4017+
/* Disable Acknowledge */
4018+
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4019+
4020+
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
40314021
{
4032-
/* Enable Acknowledge */
4033-
hi2c->Instance->CR1 |= I2C_CR1_ACK;
4022+
/* Generate Start */
4023+
hi2c->Instance->CR1 |= I2C_CR1_START;
40344024
}
4025+
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
4026+
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
40354027
}
40364028
else
40374029
{
4030+
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
4031+
40384032
/* Generate Stop */
40394033
hi2c->Instance->CR1 |= I2C_CR1_STOP;
40404034
}
@@ -4051,17 +4045,16 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40514045
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
40524046

40534047
hi2c->State = HAL_I2C_STATE_READY;
4054-
4048+
hi2c->PreviousState = I2C_STATE_NONE;
4049+
40554050
if(hi2c->Mode == HAL_I2C_MODE_MEM)
40564051
{
4057-
hi2c->PreviousState = I2C_STATE_NONE;
40584052
hi2c->Mode = HAL_I2C_MODE_NONE;
40594053

40604054
HAL_I2C_MemRxCpltCallback(hi2c);
40614055
}
40624056
else
40634057
{
4064-
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
40654058
hi2c->Mode = HAL_I2C_MODE_NONE;
40664059

40674060
HAL_I2C_MasterRxCpltCallback(hi2c);
@@ -4076,6 +4069,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40764069
return HAL_OK;
40774070
}
40784071

4072+
40794073
/**
40804074
* @brief Handle SB flag for Master
40814075
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains

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