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Merge pull request #4263 from Pliny/master
stm32f4xx: Consider all DMA ready/busy states in conditionals
2 parents bcc69b4 + 42f66ee commit a2a1581

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2 files changed

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-33
lines changed

2 files changed

+0
-33
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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma.c

Lines changed: 0 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -762,9 +762,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
762762

763763
/* Update error code */
764764
hdma->ErrorCode |= HAL_DMA_ERROR_TE;
765-
766-
/* Change the DMA state */
767-
hdma->State = HAL_DMA_STATE_ERROR; // FIX
768765
}
769766
}
770767
/* FIFO Error Interrupt management ******************************************/
@@ -777,9 +774,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
777774

778775
/* Update error code */
779776
hdma->ErrorCode |= HAL_DMA_ERROR_FE;
780-
781-
/* Change the DMA state */
782-
hdma->State = HAL_DMA_STATE_ERROR; // FIX
783777
}
784778
}
785779
/* Direct Mode Error Interrupt management ***********************************/
@@ -792,9 +786,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
792786

793787
/* Update error code */
794788
hdma->ErrorCode |= HAL_DMA_ERROR_DME;
795-
796-
/* Change the DMA state */
797-
hdma->State = HAL_DMA_STATE_ERROR; // FIX
798789
}
799790
}
800791
/* Half Transfer Complete Interrupt management ******************************/
@@ -811,9 +802,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
811802
/* Current memory buffer used is Memory 0 */
812803
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
813804
{
814-
/* Change DMA peripheral state */
815-
hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; // FIX
816-
817805
if(hdma->XferHalfCpltCallback != NULL)
818806
{
819807
/* Half transfer callback */
@@ -823,9 +811,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
823811
/* Current memory buffer used is Memory 1 */
824812
else
825813
{
826-
/* Change DMA peripheral state */
827-
hdma->State = HAL_DMA_STATE_READY_HALF_MEM1; // FIX
828-
829814
if(hdma->XferM1HalfCpltCallback != NULL)
830815
{
831816
/* Half transfer callback */
@@ -842,9 +827,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
842827
hdma->Instance->CR &= ~(DMA_IT_HT);
843828
}
844829

845-
/* Change DMA peripheral state */
846-
hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; // FIX
847-
848830
if(hdma->XferHalfCpltCallback != NULL)
849831
{
850832
/* Half transfer callback */
@@ -893,9 +875,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
893875
/* Current memory buffer used is Memory 0 */
894876
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
895877
{
896-
/* Change DMA peripheral state */
897-
hdma->State = HAL_DMA_STATE_READY_MEM1; // FIX
898-
899878
if(hdma->XferM1CpltCallback != NULL)
900879
{
901880
/* Transfer complete Callback for memory1 */
@@ -905,9 +884,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
905884
/* Current memory buffer used is Memory 1 */
906885
else
907886
{
908-
/* Change DMA peripheral state */
909-
hdma->State = HAL_DMA_STATE_READY_MEM0; // FIX
910-
911887
if(hdma->XferCpltCallback != NULL)
912888
{
913889
/* Transfer complete Callback for memory0 */
@@ -918,9 +894,6 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
918894
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
919895
else
920896
{
921-
/* Change DMA peripheral state */
922-
hdma->State = HAL_DMA_STATE_READY_MEM0; // FIX
923-
924897
if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
925898
{
926899
/* Disable the transfer complete interrupt */

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma.h

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -122,13 +122,7 @@ typedef enum
122122
{
123123
HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
124124
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
125-
HAL_DMA_STATE_READY_MEM0 = 0x11U, /*!< DMA Mem0 process success */ // FIX
126-
HAL_DMA_STATE_READY_MEM1 = 0x21U, /*!< DMA Mem1 process success */ // FIX
127-
HAL_DMA_STATE_READY_HALF_MEM0 = 0x31U, /*!< DMA Mem0 Half process success */ // FIX
128-
HAL_DMA_STATE_READY_HALF_MEM1 = 0x41U, /*!< DMA Mem1 Half process success */ // FIX
129125
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
130-
HAL_DMA_STATE_BUSY_MEM0 = 0x12U, /*!< DMA Mem0 process is ongoing */ // FIX
131-
HAL_DMA_STATE_BUSY_MEM1 = 0x22U, /*!< DMA Mem1 process is ongoing */ // FIX
132126
HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
133127
HAL_DMA_STATE_ERROR = 0x04U, /*!< DMA error state */
134128
HAL_DMA_STATE_ABORT = 0x05U, /*!< DMA Abort state */

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