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Merge pull request #4365 from LMESTM/fix_i2C_pcf_F1F2F4L1
Fix i2c communication with pcf8574 on stm32 targets of f1, f2, f4 and l1 families
2 parents f6d1972 + a1f7a36 commit a41e08c

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5 files changed

+23
-125
lines changed

5 files changed

+23
-125
lines changed

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2c.c

Lines changed: 9 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file stm32f1xx_hal_i2c.c
44
* @author MCD Application Team
5-
* @version V1.1.0
6-
* @date 14-April-2017
5+
* @version V1.1.1
6+
* @date 12-May-2017
77
* @brief I2C HAL module driver.
88
* This file provides firmware functions to manage the following
99
* functionalities of the Inter Integrated Circuit (I2C) peripheral:
@@ -1462,7 +1462,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14621462
/* Generate Start */
14631463
hi2c->Instance->CR1 |= I2C_CR1_START;
14641464
}
1465-
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
1465+
else
14661466
{
14671467
/* Generate ReStart */
14681468
hi2c->Instance->CR1 |= I2C_CR1_START;
@@ -1564,7 +1564,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15641564
/* Generate Start */
15651565
hi2c->Instance->CR1 |= I2C_CR1_START;
15661566
}
1567-
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1567+
else
15681568
{
15691569
/* Enable Acknowledge */
15701570
hi2c->Instance->CR1 |= I2C_CR1_ACK;
@@ -2198,8 +2198,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D
21982198
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
21992199
{
22002200
/* Prevent unused argument(s) compilation warning */
2201-
UNUSED(DevAddress);
2202-
2201+
UNUSED(DevAddress);
2202+
22032203
/* Abort Master transfer during Receive or Transmit process */
22042204
if(hi2c->Mode == HAL_I2C_MODE_MASTER)
22052205
{
@@ -3132,12 +3132,11 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
31323132
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
31333133
{
31343134
uint32_t tickstart = 0x00U;
3135+
__IO uint32_t count = 0U;
31353136

31363137
/* Init tickstart for timeout management*/
31373138
tickstart = HAL_GetTick();
31383139

3139-
__IO uint32_t count = 0U;
3140-
31413140
/* Check the parameters */
31423141
assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
31433142

@@ -3983,7 +3982,6 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
39833982
return HAL_OK;
39843983
}
39853984

3986-
39873985
/**
39883986
* @brief Handle RXNE flag for Master
39893987
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -3992,7 +3990,6 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
39923990
*/
39933991
static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39943992
{
3995-
39963993
if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
39973994
{
39983995
uint32_t tmp = 0U;
@@ -4033,9 +4030,8 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
40334030
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
40344031
hi2c->XferCount--;
40354032

4036-
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
4037-
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
40384033
hi2c->State = HAL_I2C_STATE_READY;
4034+
hi2c->PreviousState = I2C_STATE_NONE;
40394035

40404036
if(hi2c->Mode == HAL_I2C_MODE_MEM)
40414037
{
@@ -4061,7 +4057,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
40614057
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40624058
{
40634059
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
4064-
uint32_t tmp;
40654060
uint32_t CurrentXferOptions = hi2c->XferOptions;
40664061

40674062
if(hi2c->XferCount == 3U)
@@ -4083,19 +4078,9 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40834078
{
40844079
/* Disable Acknowledge */
40854080
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4086-
4087-
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4088-
{
4089-
/* Generate Start */
4090-
hi2c->Instance->CR1 |= I2C_CR1_START;
4091-
}
4092-
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
4093-
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
40944081
}
40954082
else
40964083
{
4097-
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
4098-
40994084
/* Generate Stop */
41004085
hi2c->Instance->CR1 |= I2C_CR1_STOP;
41014086
}
@@ -4136,7 +4121,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
41364121
return HAL_OK;
41374122
}
41384123

4139-
41404124
/**
41414125
* @brief Handle SB flag for Master
41424126
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -5568,3 +5552,4 @@ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
55685552
*/
55695553

55705554
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
5555+

‎targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c

Lines changed: 2 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1414,17 +1414,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14141414
/* Generate Start */
14151415
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
14161416
{
1417-
/* Generate Start condition if first transfer */
1418-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1419-
{
1420-
/* Generate Start */
1421-
hi2c->Instance->CR1 |= I2C_CR1_START;
1422-
}
1423-
else
1424-
{
1425-
/* Generate ReStart */
1417+
/* Generate Start or ReStart */
14261418
hi2c->Instance->CR1 |= I2C_CR1_START;
1427-
}
14281419
}
14291420

14301421
/* Process Unlocked */
@@ -1513,23 +1504,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15131504

15141505
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15151506
{
1516-
/* Generate Start condition if first transfer */
1517-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1518-
{
15191507
/* Enable Acknowledge */
15201508
hi2c->Instance->CR1 |= I2C_CR1_ACK;
15211509

1522-
/* Generate Start */
1510+
/* Generate Start or ReStart */
15231511
hi2c->Instance->CR1 |= I2C_CR1_START;
1524-
}
1525-
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1526-
{
1527-
/* Enable Acknowledge */
1528-
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1529-
1530-
/* Generate ReStart */
1531-
hi2c->Instance->CR1 |= I2C_CR1_START;
1532-
}
15331512
}
15341513

15351514
/* Process Unlocked */
@@ -3969,8 +3948,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39693948
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
39703949
hi2c->XferCount--;
39713950

3972-
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
3973-
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
39743951
hi2c->State = HAL_I2C_STATE_READY;
39753952
hi2c->PreviousState = I2C_STATE_NONE;
39763953

@@ -3998,7 +3975,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
39983975
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
39993976
{
40003977
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
4001-
uint32_t tmp;
40023978
uint32_t CurrentXferOptions = hi2c->XferOptions;
40033979

40043980
if(hi2c->XferCount == 3U)
@@ -4020,12 +3996,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40203996
{
40213997
/* Disable Acknowledge */
40223998
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4023-
4024-
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4025-
{
4026-
/* Generate ReStart */
4027-
hi2c->Instance->CR1 |= I2C_CR1_START;
4028-
}
40293999
}
40304000
else
40314001
{

‎targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c

Lines changed: 2 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1413,17 +1413,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14131413
/* Generate Start */
14141414
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
14151415
{
1416-
/* Generate Start condition if first transfer */
1417-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1418-
{
1419-
/* Generate Start */
1420-
hi2c->Instance->CR1 |= I2C_CR1_START;
1421-
}
1422-
else
1423-
{
1424-
/* Generate ReStart */
1416+
/* Generate Start or ReStart */
14251417
hi2c->Instance->CR1 |= I2C_CR1_START;
1426-
}
14271418
}
14281419

14291420
/* Process Unlocked */
@@ -1512,23 +1503,10 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15121503

15131504
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15141505
{
1515-
/* Generate Start condition if first transfer */
1516-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1517-
{
1518-
/* Enable Acknowledge */
1519-
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1520-
1521-
/* Generate Start */
1522-
hi2c->Instance->CR1 |= I2C_CR1_START;
1523-
}
1524-
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1525-
{
15261506
/* Enable Acknowledge */
15271507
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1528-
1529-
/* Generate ReStart */
1508+
/* Generate Start or ReStart */
15301509
hi2c->Instance->CR1 |= I2C_CR1_START;
1531-
}
15321510
}
15331511

15341512
/* Process Unlocked */
@@ -4015,12 +3993,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40153993
{
40163994
/* Disable Acknowledge */
40173995
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4018-
4019-
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4020-
{
4021-
/* Enable Acknowledge */
4022-
hi2c->Instance->CR1 |= I2C_CR1_START;
4023-
}
40243996
}
40253997
else
40263998
{

‎targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2c.c

Lines changed: 3 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1428,17 +1428,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14281428
/* Generate Start */
14291429
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) || (hi2c->PreviousState == I2C_STATE_NONE))
14301430
{
1431-
/* Generate Start condition if first transfer */
1432-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1433-
{
1434-
/* Generate Start */
1431+
/* Generate Start or ReStart */
14351432
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1436-
}
1437-
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
1438-
{
1439-
/* Generate ReStart */
1440-
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1441-
}
14421433
}
14431434

14441435
/* Process Unlocked */
@@ -1527,23 +1518,10 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15271518

15281519
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15291520
{
1530-
/* Generate Start condition if first transfer */
1531-
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1532-
{
15331521
/* Enable Acknowledge */
15341522
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1535-
1536-
/* Generate Start */
1523+
/* Generate Start or ReStart */
15371524
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1538-
}
1539-
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1540-
{
1541-
/* Enable Acknowledge */
1542-
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1543-
1544-
/* Generate ReStart */
1545-
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1546-
}
15471525
}
15481526

15491527
/* Process Unlocked */
@@ -3840,9 +3818,8 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
38403818
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
38413819
hi2c->XferCount--;
38423820

3843-
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
3844-
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
38453821
hi2c->State = HAL_I2C_STATE_READY;
3822+
hi2c->PreviousState = I2C_STATE_NONE;
38463823

38473824
if(hi2c->Mode == HAL_I2C_MODE_MEM)
38483825
{
@@ -3868,7 +3845,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
38683845
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
38693846
{
38703847
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
3871-
uint32_t tmp;
38723848
uint32_t CurrentXferOptions = hi2c->XferOptions;
38733849

38743850
if(hi2c->XferCount == 3U)
@@ -3890,14 +3866,6 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
38903866
{
38913867
/* Disable Acknowledge */
38923868
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3893-
3894-
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
3895-
{
3896-
/* Generate Start */
3897-
hi2c->Instance->CR1 |= I2C_CR1_START;
3898-
}
3899-
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
3900-
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
39013869
}
39023870
else
39033871
{

‎targets/TARGET_STM/pinmap.c

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -72,14 +72,17 @@ void pin_function(PinName pin, int data)
7272
GPIO_TypeDef *gpio = Set_GPIO_Clock(port);
7373

7474
/* Set default speed to high.
75-
* This is done before other settings on purpose:
7675
* For most families there are dedicated registers so it is
7776
* not so important, register can be set at any time.
78-
* But for families like F1, speed only applies to output. so we set
79-
* it here, and then if input is selected, this setting might be
80-
* overriden by the input one.
77+
* But for families like F1, speed only applies to output.
8178
*/
79+
#if defined (TARGET_STM32F1)
80+
if (mode == STM_PIN_OUTPUT) {
81+
#endif
8282
LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
83+
#if defined (TARGET_STM32F1)
84+
}
85+
#endif
8386

8487
switch (mode) {
8588
case STM_PIN_INPUT:

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