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mpolojarstevew817
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SiLabs: serial_api: Fix LEUART interrupt dispatch
Conditional when dispatching LEUART irq would always select the RX side due to a bitwise AND being typoed as a logical AND. Second, the TX interrupt was not cleared after processing, causing it to stay in an infinite loop.
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  • libraries/mbed/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32

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libraries/mbed/targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -122,20 +122,22 @@ static void usart2_tx_irq() { uart_irq(USART_2, 4, TxIrq); USART_IntClear((USART
122122
#ifdef LEUART0
123123
static void leuart0_irq()
124124
{
125-
if(LEUART_IntGetEnabled(LEUART0) && (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IFC_PERR | LEUART_IF_RXOF)) {
125+
if(LEUART_IntGetEnabled(LEUART0) & (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IF_PERR | LEUART_IF_RXOF)) {
126126
uart_irq(LEUART_0, 5, RxIrq);
127127
} else {
128128
uart_irq(LEUART_0, 5, TxIrq);
129+
LEUART_IntClear(LEUART0, LEUART_IFC_TXC);
129130
}
130131
}
131132
#endif
132133
#ifdef LEUART1
133134
static void leuart1_irq()
134135
{
135-
if(LEUART_IntGetEnabled(LEUART1) && (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IFC_PERR | LEUART_IF_RXOF)) {
136+
if(LEUART_IntGetEnabled(LEUART1) & (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IF_PERR | LEUART_IF_RXOF)) {
136137
uart_irq(LEUART_1, 6, RxIrq);
137138
} else {
138139
uart_irq(LEUART_1, 6, TxIrq);
140+
LEUART_IntClear(LEUART1, LEUART_IFC_TXC);
139141
}
140142
}
141143
#endif

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