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Commit a86b809

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stevew817adbridge
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Update to Gecko SDK 5.1.2
Update RAIL library to 1.5.1
1 parent 67ecbb7 commit a86b809

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15 files changed

+1114
-382
lines changed

15 files changed

+1114
-382
lines changed

features/nanostack/FEATURE_NANOSTACK/targets/TARGET_SL_RAIL/NanostackRfPhyEfr32.cpp

Lines changed: 55 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -826,4 +826,59 @@ static bool rail_checkAndSwitchChannel(uint8_t newChannel) {
826826
} else {
827827
return false;
828828
}
829+
}
830+
831+
/**
832+
* Callback that fires when the receive fifo exceeds the configured threshold
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* value
834+
*
835+
* @param[in] bytesAvailable Number of bytes available in the receive fifo at
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* the time of the callback dispatch
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*
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* @return void
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* @warning You must implement a stub for this in your RAIL application.
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*
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* Callback that fires when the receive fifo exceeds the configured threshold
842+
* value. Provides the number of bytes available in the receive fifo at the
843+
* time of the callback dispatch.
844+
*/
845+
void RAILCb_RxFifoAlmostFull(uint16_t bytesAvailable) {
846+
tr_debug("RX near full (%d)\n", bytesAvailable);
847+
}
848+
849+
/**
850+
* Callback that fires when the transmit fifo falls under the configured
851+
* threshold value
852+
*
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* @param[in] spaceAvailable Number of bytes open in the transmit fifo at the
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* time of the callback dispatch
855+
*
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* @return void
857+
* @warning You must implement a stub for this in your RAIL application.
858+
*
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* Callback that fires when the transmit fifo falls under the configured
860+
* threshold value. It only fires if a rising edge occurs across this
861+
* threshold. This callback will not fire on initailization nor after resetting
862+
* the transmit fifo with RAIL_ResetFifo().
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*
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* Provides the number of bytes open in the transmit fifo at the time of the
865+
* callback dispatch.
866+
*/
867+
void RAILCb_TxFifoAlmostEmpty(uint16_t spaceAvailable) {
868+
tr_debug("TX near empty (%d)\n", spaceAvailable);
869+
}
870+
871+
/**
872+
* Callback for when AGC averaged RSSI is done
873+
*
874+
* @param avgRssi Contains the the RSSI in quarter dBm (dbm*4) on success and
875+
* returns \ref RAIL_RSSI_INVALID if there was a problem computing the result.
876+
*
877+
* Called in response to RAIL_StartAverageRSSI() to indicate that the hardware
878+
* has completed averaging. If you would like you can instead use the
879+
* RAIL_AverageRSSIReady() to wait for completion and RAIL_GetAverageRSSI() to
880+
* get the result.
881+
*/
882+
void RAILCb_RssiAverageDone(int16_t avgRssi) {
883+
tr_debug("RSSI done (%d)\n", avgRssi);
829884
}

targets/TARGET_Silicon_Labs/TARGET_SL_RAIL/efr32-rf-driver/buffer-pool-memory-manager/buffer_pool_allocator.c

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
#include "buffer_pool_allocator.h"
1111

12-
#include "em_int.h"
12+
#include "em_core.h"
1313

1414
#ifdef CONFIGURATION_HEADER
1515
#include CONFIGURATION_HEADER
@@ -19,12 +19,11 @@
1919
// Configuration Macros
2020
// -----------------------------------------------------------------------------
2121

22-
// Default to a ping-pong buffer pool with a size of 128 (127 MTU + 1 length) bytes per buffer
2322
#ifndef BUFFER_POOL_SIZE
2423
#define BUFFER_POOL_SIZE 8
2524
#endif
2625
#ifndef MAX_BUFFER_SIZE
27-
#define MAX_BUFFER_SIZE 150
26+
#define MAX_BUFFER_SIZE 160
2827
#endif
2928

3029
#define INVALID_BUFFER_OBJ ((void*)0xFFFFFFFF)
@@ -46,7 +45,8 @@ void* memoryAllocate(uint32_t size)
4645
return INVALID_BUFFER_OBJ;
4746
}
4847

49-
INT_Disable();
48+
CORE_DECLARE_IRQ_STATE;
49+
CORE_ENTER_CRITICAL();
5050
for(i = 0; i < BUFFER_POOL_SIZE; i++)
5151
{
5252
if(memoryObjs[i].refCount == 0)
@@ -56,7 +56,7 @@ void* memoryAllocate(uint32_t size)
5656
break;
5757
}
5858
}
59-
INT_Enable();
59+
CORE_EXIT_CRITICAL();
6060

6161
return handle;
6262
}
@@ -71,32 +71,35 @@ void *memoryPtrFromHandle(void *handle)
7171
return NULL;
7272
}
7373

74-
INT_Disable();
74+
CORE_DECLARE_IRQ_STATE;
75+
CORE_ENTER_CRITICAL();
7576
if(memoryObjs[(uint32_t)handle].refCount > 0)
7677
{
7778
ptr = memoryObjs[(uint32_t)handle].data;
7879
}
79-
INT_Enable();
80+
CORE_EXIT_CRITICAL();
8081

8182
return ptr;
8283
}
8384

8485
void memoryFree(void *handle)
8586
{
86-
INT_Disable();
87+
CORE_DECLARE_IRQ_STATE;
88+
CORE_ENTER_CRITICAL();
8789
if(memoryPtrFromHandle(handle) != NULL)
8890
{
8991
memoryObjs[(uint32_t)handle].refCount--;
9092
}
91-
INT_Enable();
93+
CORE_EXIT_CRITICAL();
9294
}
9395

9496
void memoryTakeReference(void *handle)
9597
{
96-
INT_Disable();
98+
CORE_DECLARE_IRQ_STATE;
99+
CORE_ENTER_CRITICAL();
97100
if(memoryPtrFromHandle(handle) != NULL)
98101
{
99102
memoryObjs[(uint32_t)handle].refCount++;
100103
}
101-
INT_Enable();
104+
CORE_EXIT_CRITICAL();
102105
}

targets/TARGET_Silicon_Labs/TARGET_SL_RAIL/efr32-rf-driver/rail/TOOLCHAIN_GCC_ARM/TARGET_EFR32MG1/ieee802154_efr32xg1_configurator_out.c

Lines changed: 0 additions & 103 deletions
This file was deleted.

targets/TARGET_Silicon_Labs/TARGET_SL_RAIL/efr32-rf-driver/rail/TOOLCHAIN_GCC_ARM/TARGET_EFR32MG12/ieee802154_efr32xg12_configurator_out.c

Lines changed: 0 additions & 133 deletions
This file was deleted.

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