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jeromecoutantjeromecoutant
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STM32F4 bypass PLL configuration when already done by bootloader
1 parent 918d679 commit ab80e30

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2 files changed

+46
-32
lines changed

2 files changed

+46
-32
lines changed

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_NUCLEO_F411RE/system_clock.c

Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -98,26 +98,33 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
9898
__HAL_RCC_PWR_CLK_ENABLE();
9999
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
100100

101-
// Enable HSE oscillator and activate PLL with HSE as source
102-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
103-
if (bypass == 0) {
104-
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
105-
} else {
106-
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
107-
}
101+
/* Get the Clocks configuration according to the internal RCC registers */
102+
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
103+
104+
/* PLL could be already configured by bootlader */
105+
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
106+
107+
// Enable HSE oscillator and activate PLL with HSE as source
108+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
109+
if (bypass == 0) {
110+
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
111+
} else {
112+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
113+
}
108114

109-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
110-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
111-
RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4)
115+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
116+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
117+
RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4)
112118
#if (DEVICE_USBDEVICE)
113-
RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192)
119+
RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192)
114120
#else /* DEVICE_USBDEVICE */
115-
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200)
121+
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200)
116122
#endif /* DEVICE_USBDEVICE */
117-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE)
118-
RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1)
119-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
120-
return 0; // FAIL
123+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE)
124+
RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1)
125+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
126+
return 0; // FAIL
127+
}
121128
}
122129

123130
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c

Lines changed: 23 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -95,26 +95,33 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
9595
__HAL_RCC_PWR_CLK_ENABLE();
9696
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
9797

98-
// Enable HSE oscillator and activate PLL with HSE as source
99-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
100-
if (bypass == 0) {
101-
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
102-
} else {
103-
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
104-
}
98+
/* Get the Clocks configuration according to the internal RCC registers */
99+
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
100+
101+
/* PLL could be already configured by bootlader */
102+
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
103+
104+
// Enable HSE oscillator and activate PLL with HSE as source
105+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
106+
if (bypass == 0) {
107+
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
108+
} else {
109+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
110+
}
105111

106-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
107-
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
108-
RCC_OscInitStruct.PLL.PLLM = 8;
112+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
113+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
114+
RCC_OscInitStruct.PLL.PLLM = 8;
109115
#if (DEVICE_USBDEVICE)
110-
RCC_OscInitStruct.PLL.PLLN = 336;
116+
RCC_OscInitStruct.PLL.PLLN = 336;
111117
#else
112-
RCC_OscInitStruct.PLL.PLLN = 360;
118+
RCC_OscInitStruct.PLL.PLLN = 360;
113119
#endif
114-
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
115-
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
116-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
117-
return 0; // FAIL
120+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
121+
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
122+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
123+
return 0; // FAIL
124+
}
118125
}
119126

120127
// Activate the OverDrive to reach the 180 MHz Frequency

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