[NUC472/M453] Fixed scatterAssert of ROM limit

cyliangtw · cyliangtw · commit ab814661e55a · 2017-03-23T15:25:08.000+08:00
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct
@@ -32,6 +32,6 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 256 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 256 KB APROM
 ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000)   ; 32 KB SRAM
 
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_STD/M453.sct
@@ -32,6 +32,6 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 256 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 256 KB APROM
 ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000)   ; 32 KB SRAM
 
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct
@@ -38,7 +38,7 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 512 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 512 KB APROM
 ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000)   ; 64 KB SRAM (internal)
 ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000)   ; 1 MB SRAM (external)
 
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct
@@ -33,6 +33,6 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 512 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 512 KB APROM
 ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000)   ; 64 KB SRAM (internal)
 
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_SUPPORTED/NUC472.sct
@@ -40,7 +40,7 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 512 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 512 KB APROM
 ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000)   ; 64 KB SRAM (internal)
 ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000)   ; 1 MB SRAM (external)
 
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_STD/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct
@@ -33,6 +33,6 @@ LR_IROM1 MBED_APP_START {
   ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
   }
 }
-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE)    ; 512 KB APROM
+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))    ; 512 KB APROM
 ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000)   ; 64 KB SRAM (internal)
 

Original file line number	Diff line number	Diff line change
`@@ -32,6 +32,6 @@ LR_IROM1 MBED_APP_START {`
`32`	`32`	`ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`33`	`33`	`}`
`34`	`34`	`}`
`35`		`-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 256 KB APROM`
	`35`	`+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 256 KB APROM`
`36`	`36`	`ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM`
`37`	`37`
Original file line number	Diff line number	Diff line change
`@@ -38,7 +38,7 @@ LR_IROM1 MBED_APP_START {`
`38`	`38`	`ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {`
`39`	`39`	`}`
`40`	`40`	`}`
`41`		`-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM`
	`41`	`+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM`
`42`	`42`	`ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)`
`43`	`43`	`ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external)`
`44`	`44`
Original file line number	Diff line number	Diff line change
`@@ -33,6 +33,6 @@ LR_IROM1 MBED_APP_START {`
`33`	`33`	`ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {`
`34`	`34`	`}`
`35`	`35`	`}`
`36`		`-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM`
	`36`	`+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM`
`37`	`37`	`ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)`
`38`	`38`
Original file line number	Diff line number	Diff line change
`@@ -40,7 +40,7 @@ LR_IROM1 MBED_APP_START {`
`40`	`40`	`ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {`
`41`	`41`	`}`
`42`	`42`	`}`
`43`		`-ScatterAssert(LoadLimit(LR_IROM1) <= MBED_APP_SIZE) ; 512 KB APROM`
	`43`	`+ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM`
`44`	`44`	`ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)`
`45`	`45`	`ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external)`
`46`	`46`