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Oren CohenMichael Schwarcz
Oren Cohen
authored and
Michael Schwarcz
committed
Add FUTURE_SEQUANA_PSA target
* Modify linker scripts to be compatible with bootloader and PSA * Add memory protection * Modify original post-build step to allow link with PSA binaries * Config kvstore for ITS on FUTURE_SEQUANA_PSA
1 parent 19a5091 commit ad32209

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19 files changed

+2859
-23
lines changed

19 files changed

+2859
-23
lines changed

‎features/storage/kvstore/conf/mbed_lib.json

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,9 @@
1414
"K64F": {
1515
"storage_type": "TDB_INTERNAL"
1616
},
17+
"FUTURE_SEQUANA_M0_PSA": {
18+
"storage_type": "TDB_INTERNAL"
19+
},
1720
"K66F": {
1821
"storage_type": "TDB_INTERNAL"
1922
}

‎features/storage/kvstore/conf/tdb_internal/mbed_lib.json

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,5 +9,11 @@
99
"help": "If default, the base address is set to the first sector after the application code ends.",
1010
"value": "0"
1111
}
12+
},
13+
"target_overrides": {
14+
"FUTURE_SEQUANA_M0_PSA": {
15+
"internal_size": "0x8000",
16+
"internal_base_address": "0x10078000"
17+
}
1218
}
1319
}

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,22 @@
3030
;* SPDX-License-Identifier: Apache-2.0
3131
;******************************************************************************/
3232

33+
#if !defined(MBED_ROM_START)
34+
#define MBED_ROM_START 0x10000000
35+
#endif
36+
37+
#if !defined(MBED_ROM_SIZE)
38+
#define MBED_ROM_SIZE 0x78000
39+
#endif
40+
41+
#if !defined(MBED_RAM_START)
42+
#define MBED_RAM_START 0x08000000
43+
#endif
44+
45+
#if !defined(MBED_RAM_SIZE)
46+
#define MBED_RAM_SIZE 0x10000
47+
#endif
48+
3349
; The defines below describe the location and size of blocks of memory in the target.
3450
; Use these defines to specify the memory regions available for allocation.
3551

@@ -39,12 +55,12 @@
3955
; where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.scat'.
4056
; RAM
4157
; RAM
42-
#define RAM_START 0x08000000
43-
#define RAM_SIZE 0x00010000
58+
#define RAM_START MBED_RAM_START
59+
#define RAM_SIZE MBED_RAM_SIZE
4460
; Flash
4561
; Flash
46-
#define FLASH_START 0x10000000
47-
#define FLASH_SIZE 0x00078000
62+
#define FLASH_START MBED_ROM_START
63+
#define FLASH_SIZE MBED_ROM_SIZE
4864

4965
; The following defines describe a 32K flash region used for EEPROM emulation.
5066
; This region can also be used as the general purpose flash.

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,21 @@ SEARCH_DIR(.)
2828
GROUP(-lgcc -lc -lnosys)
2929
ENTRY(Reset_Handler)
3030

31+
#if !defined(MBED_ROM_START)
32+
#define MBED_ROM_START 0x10000000
33+
#endif
34+
35+
#if !defined(MBED_ROM_SIZE)
36+
#define MBED_ROM_SIZE 0x78000
37+
#endif
38+
39+
#if !defined(MBED_RAM_START)
40+
#define MBED_RAM_START 0x08000000
41+
#endif
42+
43+
#if !defined(MBED_RAM_SIZE)
44+
#define MBED_RAM_SIZE 0x10000
45+
#endif
3146

3247
/* Force symbol to be entered in the output file as an undefined symbol. Doing
3348
* this may, for example, trigger linking of additional modules from standard
@@ -47,8 +62,8 @@ MEMORY
4762
* Your changes must be aligned with the corresponding memory regions for the CM4 core in 'xx_cm4_dual.ld',
4863
* where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.ld'.
4964
*/
50-
ram (rwx) : ORIGIN = 0x08000000, LENGTH = 0x10000
51-
flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x78000
65+
ram (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
66+
flash (rx) : ORIGIN = MBED_ROM_START, LENGTH = MBED_ROM_SIZE
5267

5368
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
5469
* You can assign sections to this memory region for only one of the cores.
@@ -333,7 +348,7 @@ SECTIONS
333348
KEEP(*(.cy_toc_part2))
334349
} > sflash_toc_2
335350

336-
351+
337352
/* Supervisory Flash: Table of Content # 2 Copy */
338353
.cy_rtoc_part2 :
339354
{

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,22 @@
2929
/*-Specials-*/
3030
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
3131

32+
if (!isdefinedsymbol(MBED_ROM_START)) {
33+
define symbol MBED_ROM_START = 0x10000000;
34+
}
35+
36+
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
37+
define symbol MBED_ROM_SIZE = 0x78000;
38+
}
39+
40+
if (!isdefinedsymbol(MBED_RAM_START)) {
41+
define symbol MBED_RAM_START = 0x08000000;
42+
}
43+
44+
if (!isdefinedsymbol(MBED_RAM_SIZE)) {
45+
define symbol MBED_RAM_SIZE = 0x10000;
46+
}
47+
3248
/* The symbols below define the location and size of blocks of memory in the target.
3349
* Use these symbols to specify the memory regions available for allocation.
3450
*/
@@ -39,11 +55,11 @@ define symbol __ICFEDIT_intvec_start__ = 0x00000000;
3955
* where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.icf'.
4056
*/
4157
/* RAM */
42-
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
43-
define symbol __ICFEDIT_region_IRAM1_end__ = 0x08010000;
58+
define symbol __ICFEDIT_region_IRAM1_start__ = MBED_RAM_START;
59+
define symbol __ICFEDIT_region_IRAM1_end__ = (MBED_RAM_START + MBED_RAM_SIZE);
4460
/* Flash */
45-
define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
46-
define symbol __ICFEDIT_region_IROM1_end__ = 0x10078000;
61+
define symbol __ICFEDIT_region_IROM1_start__ = MBED_ROM_START;
62+
define symbol __ICFEDIT_region_IROM1_end__ = (MBED_ROM_START + MBED_ROM_SIZE);
4763

4864
/* The following symbols define a 32K flash region used for EEPROM emulation.
4965
* This region can also be used as the general purpose flash.

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/system_psoc63_cm0plus.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,9 @@ void mbed_sdk_init(void)
153153
ipcrpc_init();
154154
}
155155

156+
#if defined(COMPONENT_SPM_MAILBOX)
157+
void mailbox_init(void);
158+
#endif
156159

157160
/*******************************************************************************
158161
* Function Name: SystemInit
@@ -189,6 +192,10 @@ void SystemInit(void)
189192
Cy_SystemInit();
190193
SystemCoreClockUpdate();
191194

195+
#if defined(COMPONENT_SPM_MAILBOX)
196+
mailbox_init();
197+
#endif
198+
192199
#if defined(CY_DEVICE_PSOC6ABLE2)
193200
#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
194201
/* Allocate and initialize semaphores for the system operations. */

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,22 @@
3030
;* SPDX-License-Identifier: Apache-2.0
3131
;******************************************************************************/
3232

33+
#if !defined(MBED_ROM_START)
34+
#define MBED_ROM_START 0x10080000
35+
#endif
36+
37+
#if !defined(MBED_ROM_SIZE)
38+
#define MBED_ROM_SIZE 0x78000
39+
#endif
40+
41+
#if !defined(MBED_RAM_START)
42+
#define MBED_RAM_START 0x08010000
43+
#endif
44+
45+
#if !defined(MBED_RAM_SIZE)
46+
#define MBED_RAM_SIZE 0x37800
47+
#endif
48+
3349
; The defines below describe the location and size of blocks of memory in the target.
3450
; Use these defines to specify the memory regions available for allocation.
3551

@@ -41,12 +57,12 @@
4157
; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
4258
; RAM
4359
; RAM
44-
#define RAM_START 0x08010000
45-
#define RAM_SIZE 0x00037800
60+
#define RAM_START MBED_RAM_START
61+
#define RAM_SIZE MBED_RAM_SIZE
4662
; Flash
4763
; Flash
48-
#define FLASH_START 0x10080000
49-
#define FLASH_SIZE 0x00078000
64+
#define FLASH_START MBED_ROM_START
65+
#define FLASH_SIZE MBED_ROM_SIZE
5066

5167
; The following defines describe a 32K flash region used for EEPROM emulation.
5268
; This region can also be used as the general purpose flash.

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,21 @@ SEARCH_DIR(.)
2828
GROUP(-lgcc -lc -lnosys)
2929
ENTRY(Reset_Handler)
3030

31+
#if !defined(MBED_ROM_START)
32+
#define MBED_ROM_START 0x10080000
33+
#endif
34+
35+
#if !defined(MBED_ROM_SIZE)
36+
#define MBED_ROM_SIZE 0x78000
37+
#endif
38+
39+
#if !defined(MBED_RAM_START)
40+
#define MBED_RAM_START 0x08010000
41+
#endif
42+
43+
#if !defined(MBED_RAM_SIZE)
44+
#define MBED_RAM_SIZE 0x37800
45+
#endif
3146

3247
/* Force symbol to be entered in the output file as an undefined symbol. Doing
3348
* this may, for example, trigger linking of additional modules from standard
@@ -49,8 +64,8 @@ MEMORY
4964
* Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
5065
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
5166
*/
52-
ram (rwx) : ORIGIN = 0x08010000, LENGTH = 0x37800
53-
flash (rx) : ORIGIN = 0x10080000, LENGTH = 0x78000
67+
ram (rwx) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
68+
flash (rx) : ORIGIN = MBED_ROM_START, LENGTH = MBED_ROM_SIZE
5469

5570
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
5671
* You can assign sections to this memory region for only one of the cores.
@@ -339,7 +354,7 @@ SECTIONS
339354
KEEP(*(.cy_toc_part2))
340355
} > sflash_toc_2
341356

342-
357+
343358
/* Supervisory Flash: Table of Content # 2 Copy */
344359
.cy_rtoc_part2 :
345360
{

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,22 @@
2929
/*-Specials-*/
3030
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
3131

32+
if (!isdefinedsymbol(MBED_ROM_START)) {
33+
define symbol MBED_ROM_START = 0x10080000;
34+
}
35+
36+
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
37+
define symbol MBED_ROM_SIZE = 0x78000;
38+
}
39+
40+
if (!isdefinedsymbol(MBED_RAM_START)) {
41+
define symbol MBED_RAM_START = 0x08010000;
42+
}
43+
44+
if (!isdefinedsymbol(MBED_RAM_SIZE)) {
45+
define symbol MBED_RAM_SIZE = 0x37800;
46+
}
47+
3248
/* The symbols below define the location and size of blocks of memory in the target.
3349
* Use these symbols to specify the memory regions available for allocation.
3450
*/
@@ -41,11 +57,11 @@ define symbol __ICFEDIT_intvec_start__ = 0x00000000;
4157
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
4258
*/
4359
/* RAM */
44-
define symbol __ICFEDIT_region_IRAM1_start__ = 0x08010000;
45-
define symbol __ICFEDIT_region_IRAM1_end__ = 0x08047800;
60+
define symbol __ICFEDIT_region_IRAM1_start__ = MBED_RAM_START;
61+
define symbol __ICFEDIT_region_IRAM1_end__ = (MBED_RAM_START + MBED_RAM_SIZE);
4662
/* Flash */
47-
define symbol __ICFEDIT_region_IROM1_start__ = 0x10080000;
48-
define symbol __ICFEDIT_region_IROM1_end__ = 0x100F8000;
63+
define symbol __ICFEDIT_region_IROM1_start__ = MBED_ROM_START;
64+
define symbol __ICFEDIT_region_IROM1_end__ = (MBED_ROM_START + MBED_ROM_SIZE);
4965

5066
/* The following symbols define a 32K flash region used for EEPROM emulation.
5167
* This region can also be used as the general purpose flash.

‎targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/system_psoc63_cm4.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,6 +124,9 @@ uint32_t cy_delay32kMs = CY_DELAY_MS_OVERFLOW_THRESHOLD *
124124
#define CY_ROOT_PATH_SRC_DSI_MUX_PILO (19UL)
125125
#endif /* (SRSS_PILO_PRESENT == 1U) */
126126

127+
#if defined(COMPONENT_SPM_MAILBOX)
128+
void mailbox_init(void);
129+
#endif
127130

128131
/*******************************************************************************
129132
* Function Name: SystemInit
@@ -161,6 +164,10 @@ void SystemInit(void)
161164

162165
Cy_SystemInit();
163166
SystemCoreClockUpdate();
167+
168+
#if defined(COMPONENT_SPM_MAILBOX)
169+
mailbox_init();
170+
#endif
164171
}
165172

166173

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