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Qinghao ShiQinghao Shi
Qinghao Shi
authored and
Qinghao Shi
committed
Enable new HAL us_ticker API on fast model MPS2 platform
1 parent 74aec93 commit ad668a7

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7 files changed

+94
-67
lines changed

7 files changed

+94
-67
lines changed

‎targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/CMSDK_CM0.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -270,7 +270,7 @@ typedef struct {
270270
#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
271271

272272
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
273-
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
273+
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
274274

275275
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
276276
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
@@ -306,7 +306,7 @@ typedef struct {
306306
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
307307

308308
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
309-
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
309+
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
310310

311311
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
312312
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
@@ -329,12 +329,12 @@ typedef struct {
329329

330330
typedef struct {
331331
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
332-
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
333-
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
334-
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
335-
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
336-
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
337-
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
332+
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
333+
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
334+
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
335+
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
336+
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
337+
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
338338
} CMSDK_DUALTIMER_SINGLE_TypeDef;
339339

340340
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */

‎targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/CMSDK_CM0plus.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -271,7 +271,7 @@ typedef struct {
271271
#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
272272

273273
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
274-
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
274+
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
275275

276276
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
277277
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
@@ -307,7 +307,7 @@ typedef struct {
307307
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
308308

309309
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
310-
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
310+
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
311311

312312
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
313313
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
@@ -330,12 +330,12 @@ typedef struct {
330330

331331
typedef struct {
332332
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
333-
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
334-
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
335-
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
336-
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
337-
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
338-
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
333+
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
334+
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
335+
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
336+
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
337+
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
338+
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
339339
} CMSDK_DUALTIMER_SINGLE_TypeDef;
340340

341341
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */

‎targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/CMSDK_CM3.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -272,7 +272,7 @@ typedef struct {
272272
#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
273273

274274
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
275-
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
275+
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
276276

277277
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
278278
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
@@ -308,7 +308,7 @@ typedef struct {
308308
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
309309

310310
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
311-
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
311+
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
312312

313313
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
314314
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
@@ -331,12 +331,12 @@ typedef struct {
331331

332332
typedef struct {
333333
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
334-
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
335-
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
336-
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
337-
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
338-
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
339-
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
334+
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
335+
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
336+
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
337+
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
338+
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
339+
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
340340
} CMSDK_DUALTIMER_SINGLE_TypeDef;
341341

342342
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */

‎targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/CMSDK_CM4.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -321,7 +321,7 @@ typedef struct {
321321
#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
322322

323323
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
324-
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
324+
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
325325

326326
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
327327
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
@@ -357,7 +357,7 @@ typedef struct {
357357
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /*!< CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
358358

359359
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
360-
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
360+
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
361361

362362
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
363363
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /*!< CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
@@ -379,8 +379,8 @@ typedef struct {
379379

380380
typedef struct {
381381
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
382-
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
383-
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
382+
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
383+
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
384384
/* <o.7> TimerEn: Timer Enable */
385385
/* <o.6> TimerMode: Timer Mode */
386386
/* <0=> Freerunning-mode */
@@ -398,10 +398,10 @@ typedef struct {
398398
/* <0=> Wrapping mode */
399399
/* <1=> One-shot mode */
400400
/* </h> */
401-
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
402-
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
403-
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
404-
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
401+
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
402+
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
403+
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
404+
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
405405
} CMSDK_DUALTIMER_SINGLE_TypeDef;
406406

407407
#define CMSDK_DUALTIMER_LOAD_Pos 0 /*!< CMSDK_DUALTIMER LOAD: LOAD Position */

‎targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/CMSDK_CM7.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -278,7 +278,7 @@ typedef struct {
278278
#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */
279279

280280
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */
281-
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
281+
#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */
282282

283283
#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */
284284
#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */
@@ -314,7 +314,7 @@ typedef struct {
314314
#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */
315315

316316
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */
317-
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
317+
#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */
318318

319319
#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */
320320
#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */
@@ -337,12 +337,12 @@ typedef struct {
337337

338338
typedef struct {
339339
__IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */
340-
__I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */
341-
__IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */
342-
__O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */
343-
__I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */
344-
__I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */
345-
__IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */
340+
__I uint32_t TimerValue; /* Offset: 0x004 (R/ ) Timer Counter Current Value */
341+
__IO uint32_t TimerControl; /* Offset: 0x008 (R/W) Timer Control */
342+
__O uint32_t TimerIntClr; /* Offset: 0x00C ( /W) Timer Interrupt Clear */
343+
__I uint32_t TimerRIS; /* Offset: 0x010 (R/ ) Timer Raw Interrupt Status */
344+
__I uint32_t TimerMIS; /* Offset: 0x014 (R/ ) Timer Masked Interrupt Status */
345+
__IO uint32_t TimerBGLoad; /* Offset: 0x018 (R/W) Background Load Register */
346346
} CMSDK_DUALTIMER_SINGLE_TypeDef;
347347

348348
#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */

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