Added support for PSA target to WIFI_BT board

Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files

Author: Oleg Kapshii

TESTS/mbedmicro-rtos-mbed/mail/main.cpp

@@ -33,7 +33,7 @@ using namespace utest::v1;
 #define THREAD_STACK_SIZE   512
 #elif defined(__ARM_FM)
 #define THREAD_STACK_SIZE   512
-#elif defined(TARGET_FUTURE_SEQUANA_PSA)
+#elif defined(TARGET_FUTURE_SEQUANA_PSA) || defined(TARGET_CY8CKIT_062_WIFI_BT_PSA)
 #define THREAD_STACK_SIZE   512
 #else
 #define THREAD_STACK_SIZE   320 /* larger stack cause out of heap memory on some 16kB RAM boards in multi thread test*/

TESTS/mbedmicro-rtos-mbed/malloc/main.cpp

@@ -41,7 +41,7 @@ volatile bool thread_should_continue = true;
 #define THREAD_STACK_SIZE   512
 #elif defined(__ARM_FM)
 #define THREAD_STACK_SIZE   512
-#elif defined(TARGET_FUTURE_SEQUANA_PSA)
+#elif defined(TARGET_FUTURE_SEQUANA_PSA) || defined(TARGET_CY8CKIT_062_WIFI_BT_PSA)
 #define THREAD_STACK_SIZE   512
 #else
 #define THREAD_STACK_SIZE   256

TESTS/mbedmicro-rtos-mbed/threads/main.cpp

@@ -36,7 +36,7 @@
 #define PARALLEL_THREAD_STACK_SIZE 512
 #elif defined(__ARM_FM)
 #define PARALLEL_THREAD_STACK_SIZE 512
-#elif defined(TARGET_FUTURE_SEQUANA_PSA)
+#elif defined(TARGET_FUTURE_SEQUANA_PSA) || defined(TARGET_CY8CKIT_062_WIFI_BT_PSA)
 #define PARALLEL_THREAD_STACK_SIZE   512
 #else
 #define PARALLEL_THREAD_STACK_SIZE 384

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/Psoc6BLE.cpp

@@ -2,6 +2,7 @@
  * mbed Microcontroller Library
  * Copyright (c) 2017-2017 ARM Limited
  * Copyright (c) 2017-2018 Future Electronics
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/drivers/IPCPipeTransportDriver.cpp

@@ -2,6 +2,7 @@
  * mbed Microcontroller Library
  * Copyright (c) 2017-2017 ARM Limited
  * Copyright (c) 2017-2018 Future Electronics
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CY8C63XX/drivers/IPCPipeTransportDriver.h

@@ -2,6 +2,7 @@
  * mbed Microcontroller Library
  * Copyright (c) 2017-2017 ARM Limited
  * Copyright (c) 2017-2018 Future Electronics
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

features/FEATURE_BLE/targets/TARGET_Cypress/TARGET_CYW43XXX/HCIDriver.cpp

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

features/storage/kvstore/conf/global/mbed_lib.json

@@ -14,6 +14,9 @@
         "FUTURE_SEQUANA_M0_PSA": {
             "storage_type": "TDB_INTERNAL"
         },
+        "CY8CKIT_062_WIFI_BT_M0_PSA": {
+            "storage_type": "TDB_INTERNAL"
+        },
         "K66F": {
             "storage_type": "TDB_INTERNAL"
         },

features/storage/kvstore/conf/tdb_internal/mbed_lib.json

@@ -14,6 +14,10 @@
         "FUTURE_SEQUANA_M0_PSA": {
             "internal_size": "0x8000",
             "internal_base_address": "0x10078000"
+        },
+        "CY8CKIT_062_WIFI_BT_M0_PSA": {
+            "internal_size": "0x8000",
+            "internal_base_address": "0x10078000"
         }
     }
 }

features/storage/nvstore/mbed_lib.json

@@ -49,6 +49,24 @@
         },
         "FUTURE_SEQUANA_M0_PSA": {
             "enabled" : false
+        },
+        "CY8CKIT_062_WIFI_BT": {
+            "area_1_address": "0x100F8000",
+            "area_1_size": 16384,
+            "area_2_address": "0x100FC000",
+            "area_2_size": 16384
+        },
+	"CY8CKIT_062_WIFI_BT_M0": {
+            "area_1_address": "0x10078000",
+            "area_1_size": 16384,
+            "area_2_address": "0x1007C000",
+            "area_2_size": 16384
+        },
+        "CY8CKIT_062_WIFI_BT_PSA": {
+            "enabled" : false
+        },
+        "CY8CKIT_062_WIFI_BT_M0_PSA": {
+            "enabled" : false
         }
     }
 }

targets/TARGET_Cypress/TARGET_PSOC6/PinNamesTypes.h

@@ -1,6 +1,7 @@
 /*
  * mbed Microcontroller Library
  * Copyright (c) 2017-2018 Future Electronics
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

targets/TARGET_Cypress/TARGET_PSOC6/PortNames.h

@@ -1,6 +1,7 @@
 /*
  * mbed Microcontroller Library
  * Copyright (c) 2017-2018 Future Electronics
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.

targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/PeripheralNames.h renamed to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C62XX/PeripheralNames.h

@@ -3,8 +3,8 @@
 ; to pass a scatter file through a C preprocessor.
 
 ;*******************************************************************************
-;* \file cy8c6xx7_cm4_dual.scat
-;* \version `$CY_MAJOR_VERSION`.`$CY_MINOR_VERSION`
+;* \file cy8c6xx7_cm0plus.scat
+;* \version 2.30
 ;*
 ;* Linker file for the ARMCC.
 ;*
@@ -43,19 +43,27 @@
 ;******************************************************************************/
 
 #if !defined(MBED_ROM_START)
-  #define MBED_ROM_START    0x10002000
+  #define MBED_ROM_START    0x10000000
 #endif
 
 #if !defined(MBED_ROM_SIZE)
-  #define MBED_ROM_SIZE     0x000FE000
+  #define MBED_ROM_SIZE     0x80000
 #endif
 
 #if !defined(MBED_RAM_START)
-  #define MBED_RAM_START    0x08002000
+  #define MBED_RAM_START    0x08000000
 #endif
 
 #if !defined(MBED_RAM_SIZE)
-  #define MBED_RAM_SIZE     0x00045800
+  #define MBED_RAM_SIZE     0x10000
+#endif
+
+#if !defined(MBED_PUBLIC_RAM_START)
+  #define MBED_PUBLIC_RAM_START    0x08047600
+#endif
+
+#if !defined(MBED_PUBLIC_RAM_SIZE)
+  #define MBED_PUBLIC_RAM_SIZE     0x200
 #endif
 
 #if !defined(MBED_BOOT_STACK_SIZE)
@@ -67,20 +75,23 @@
 ; The defines below describe the location and size of blocks of memory in the target.
 ; Use these defines to specify the memory regions available for allocation.
 
-; The following defines control RAM and flash memory allocation for the CM4 core.
-; You can change the memory allocation by editing RAM and Flash defines.
-; Note that 2 KB of RAM (at the end of the RAM section) are reserved for system use.
-; Using this memory region for other purposes will lead to unexpected behavior.
-; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat',
-; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
+; The following defines control RAM and flash memory allocation for the CM0+ core.
+; You can change the memory allocation by editing the RAM and Flash defines.
+; Your changes must be aligned with the corresponding defines for the CM4 core in 'xx_cm4_dual.scat',
+; where 'xx' is the device group; for example, 'cy8c6xx7_cm4_dual.scat'.
+; RAM
 ; RAM
 #define RAM_START               MBED_RAM_START
 #define RAM_SIZE                MBED_RAM_SIZE
+; Public RAM
+#define PUBLIC_RAM_START               MBED_PUBLIC_RAM_START
+#define PUBLIC_RAM_SIZE                MBED_PUBLIC_RAM_SIZE
+; Flash
 ; Flash
 #define FLASH_START             MBED_ROM_START
 #define FLASH_SIZE              MBED_ROM_SIZE
 
-; The following defines describe a 32K flash region used for EEPROM emulation.
+; The following defines describe a 32K flash region used for EEPROM emulation. 
 ; This region can also be used as the general purpose flash.
 ; You can assign sections to this memory region for only one of the cores.
 ; Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
@@ -118,8 +129,13 @@
 #define EFUSE_SIZE              0x100000
 
 
-LR_IROM1 FLASH_START FLASH_SIZE
+LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)
 {
+    .cy_app_header +0
+    {
+        * (.cy_app_header)
+    }
+
     ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
@@ -148,29 +164,17 @@ LR_IROM1 FLASH_START FLASH_SIZE
     {
         * (.noinit)
     }
-
-    ; Application heap area (HEAP)
-    ARM_LIB_HEAP  +0
-    { 
-        * (HEAP) 
-    }
 
-    ; Stack region growing down
-    ARM_LIB_STACK RAM_START+RAM_SIZE -Stack_Size 
-    {
-        * (STACK)
+    ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -Stack_Size 
+    { ; Stack region growing down
     }
 
-    ; Used for the digital signature of the secure application and the
-    ; Bootloader SDK application. The size of the section depends on the required
-    ; data size.
-    .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
+    RW_IRAM2 PUBLIC_RAM_START UNINIT
     {
-        * (.cy_app_signature)
+        * (.cy_pub_ram)
     }
 }
 
-
 ; Emulated EEPROM Flash area
 LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE
 {