TARGET_Analog_Devices: ISR stack size unification

Unify ISR stack size for targets which support MBED 5 (or MBED 2 and MBED 5).

 MBED 5 : 2 boards
----------------
EV_COG_AD4050LZ
EV_COG_AD3029LZ

 MBED 2, 5 : 0 boards
----------------

 MBED 2 : 0 boards (skipped)
----------------

Author: mprse

targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TARGET_EV_COG_AD3029LZ/device/startup_ADuCM3029.c

@@ -145,6 +145,16 @@ const pFunc SECTION_PLACE(IVT_NAME[104],VECTOR_SECTION) =
     ADUCM3029_VECTORS
 };
 
+#ifdef __STACK_SIZE
+    unsigned int  Stack_Size = __STACK_SIZE;
+#else
+#if defined(MBED_CONF_RTOS_PRESENT)
+    unsigned int  Stack_Size = 0x400;
+#else
+    unsigned int  Stack_Size = 0x1000;
+#endif
+#endif
+
 /*----------------------------------------------------------------------------
 * Initialize .bss and .data for GNU
 *----------------------------------------------------------------------------*/

targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct

@@ -1,4 +1,6 @@
 #! armcc -E
+#include "mbed_config.h"
+
 ;******************************************************************************
 ;  File: ADuCM3029.sct
 ;  Scatter loading file for Analog Devices ADuCM3029 processor
@@ -45,6 +47,16 @@
 
 #define ADUCM_VECTOR_SIZE 0x1A0
 
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #if (defined(MBED_CONF_RTOS_PRESENT))
+    #define Stack_Size                   0x0400
+  #else
+    #define Stack_Size                   0x1000
+  #endif
+#endif
+
 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
     FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {
         *(.vectors, +First)
@@ -63,11 +75,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
         .ANY (+RW)
     }
 
-    ADUCM_HEAP AlignExpr(+0, 16) EMPTY
-        (0x20003000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; heap
+    ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY
+        (0x20003000 - AlignExpr(ImageLimit(RW_IRAM1), 16) - Stack_Size) { ; heap
     }
 
-    ADUCM_STACK AlignExpr(+0, 16) EMPTY 0x1000 { ; stack
+    ARM_LIB_STACK  AlignExpr(+0, 16) EMPTY Stack_Size { ; stack
     }
 
     ADUCM_IRAM2 0x20004000 0x4000 { ; bss section

targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld

@@ -32,13 +32,6 @@ MEMORY
 
 /* Library configurations */
 GROUP(libgcc.a libc.a libm.a libnosys.a)
-/* Custom stack and heap sizes */
-__stack_size__ = 0x1000;
-__heap_size__ = 0x2000;
-
-/* select custom or default sizes for stack and heap */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0C00;
 
 /* Linker script to place sections and symbol values.
  * It references the following symbols, which must be defined in code:
@@ -220,14 +213,14 @@ SECTIONS
         __HeapBase = .;
         __end__ = .;
         end = __end__;
-        . += HEAP_SIZE;
+        . = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A) - Stack_Size;
         __HeapLimit = .;
     } > DSRAM_A
 
     /* Set stack top to end of DSRAM_A, and move stack limit down by
      * size of stack_dummy section */
     __StackTop = ORIGIN(DSRAM_C);
-    __StackLimit = __StackTop - STACK_SIZE;
+    __StackLimit = __StackTop - Stack_Size;
     PROVIDE(__stack = __StackTop);
 
     /* Check if data + heap + stack exceeds DSRAM_A limit when they are both in DSRAM_A

targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf

@@ -49,7 +49,7 @@ define region ROM_REGION                  = mem:[from MBED_APP_START+ADUCM_SECTO
 define region RAM_bank1_region            = mem:[from 0x20000200 size 0x00003E00];
 define region RAM_bank2_region            = mem:[from 0x20004000 size 0x00004000]
                                           | mem:[from 0x20040000 size 0x00007000];
-define block CSTACK   with alignment = 16, size = 0x1000 { };
+define block CSTACK   with alignment = 16, size = 0x400 { };
 define block HEAP     with alignment = 16, size = 0x2000 { };
 do not initialize                         { section .noinit };
 initialize by copy                        { rw };

targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TARGET_EV_COG_AD4050LZ/device/startup_ADuCM4050.c

@@ -149,6 +149,16 @@ const pFunc SECTION_PLACE(IVT_NAME[104],VECTOR_SECTION) = {
     ADUCM4050_VECTORS
 };
 
+#ifdef __STACK_SIZE
+    unsigned int  Stack_Size = __STACK_SIZE;
+#else
+#if defined(MBED_CONF_RTOS_PRESENT)
+    unsigned int  Stack_Size = 0x400;
+#else
+    unsigned int  Stack_Size = 0x1000;
+#endif
+#endif
+
 /*----------------------------------------------------------------------------
 * Initialize .bss and .data for GNU
 *----------------------------------------------------------------------------*/

targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct

@@ -1,4 +1,5 @@
 #! armcc -E
+#include "mbed_config.h"
 ;******************************************************************************
 ;  File: ADuCM4050.sct
 ;  Scatter loading file for Analog Devices ADuCM4050 processor
@@ -42,6 +43,16 @@
 
 #define ADUCM_VECTOR_SIZE 0x1A0
 
+#if (defined(__stack_size__))
+  #define Stack_Size                   __stack_size__
+#else
+  #if (defined(MBED_CONF_RTOS_PRESENT))
+    #define Stack_Size                   0x0400
+  #else
+    #define Stack_Size                   0x1000
+  #endif
+#endif
+
 LR_IROM1 MBED_APP_START MBED_APP_SIZE {
     FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {
         *(.vectors, +First)
@@ -62,6 +73,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
 
     ADUCM_IRAM3 0x20048000 0x10000 { *(+ZI) }
 
-    ADUCM_HEAP  AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
-        (ImageBase(ADUCM_IRAM3) - 0x2000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap
+    ARM_LIB_HEAP  AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
+        (ImageBase(ADUCM_IRAM3) - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap
+
+    ARM_LIB_STACK  AlignExpr(+0, 16) EMPTY Stack_Size { ; stack
+    }
 }

targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld

@@ -33,15 +33,6 @@ MEMORY
 /* Library configurations */
 GROUP(libgcc.a libc.a libm.a libnosys.a)
 
-/* Custom stack and heap sizes */
-__stack_size__ = 0x2000;
-__heap_size__  = 0x6000;
-
-/* select custom or default sizes for stack and heap */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0C00;
-
-
 /* Linker script to place sections and symbol values.
  * It references the following symbols, which must be defined in code:
  *   Reset_Handler : Entry of reset handler
@@ -207,10 +198,15 @@ SECTIONS
         __bss_end__ = .;
     } > DSRAM_B
 
+    .heap :
+    {
+        . = ALIGN(8);
+        __HeapBase = .;
+    } > DSRAM_B
+
     __StackTop = ORIGIN(DSRAM_B);
-    __StackLimit = __StackTop  - STACK_SIZE;
+    __StackLimit = __StackTop  - Stack_Size;
     __HeapLimit  = __StackLimit;
-    __HeapBase   = __HeapLimit - HEAP_SIZE;
     __end__      = __HeapBase;
     PROVIDE(end  = __end__);
     PROVIDE(__stack = __StackTop);

targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf

@@ -49,7 +49,7 @@ define region ROM_REGION                  = mem:[from MBED_APP_START+ADUCM_SECTO
 define region RAM_bank1_region            = mem:[from 0x20040000 size 0x00008000];
 define region RAM_bank2_region            = mem:[from 0x20000200 size 0x00006E00]
                                           | mem:[from 0x20048000 size 0x00010000];
-define block CSTACK   with alignment = 16, size = 0x2000 { };
+define block CSTACK   with alignment = 16, size = 0x400 { };
 define block HEAP     with alignment = 16, size = 0x6000 { };
 do not initialize                         { section .noinit };
 initialize by copy                        { rw };

targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf

@@ -11,8 +11,7 @@ define symbol __ICFEDIT_region_NVIC_end__   = 0x100000FF;
 define symbol __ICFEDIT_region_RAM_start__   = 0x10000100;
 define symbol __ICFEDIT_region_RAM_end__     = 0x10007FDF;
 /*-Sizes-*/
-/*Heap 1/4 of ram and stack 1/8*/
-define symbol __ICFEDIT_size_cstack__   = 0x1000;
+define symbol __ICFEDIT_size_cstack__   = 0x400;
 define symbol __ICFEDIT_size_heap__     = 0x2000;
 /**** End of ICF editor section. ###ICF###*/