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ABOSTMABOSTM
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TARGET_STM: Remove timeout on HSEM.
With tickless mechanism hsem can be used for quite a long time (time to set up PLL clock). Also, if hsem is held to long, then this is not the current core which is faulty, but probably the other (the one which hold the HSEM)
1 parent 41b038a commit affe711

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17 files changed

+33
-65
lines changed

17 files changed

+33
-65
lines changed

‎features/mbedtls/targets/TARGET_STM/TARGET_STM32L4/aes_alt.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -93,8 +93,7 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx)
9393
return;
9494
}
9595
#if defined(DUAL_CORE)
96-
uint32_t timeout = HSEM_TIMEOUT;
97-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
96+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
9897
}
9998
#endif /* DUAL_CORE */
10099
/* Force the CRYP Periheral Clock Reset */

‎targets/TARGET_STM/TARGET_STM32H7/analogin_device.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -89,8 +89,7 @@ void analogin_init(analogin_t *obj, PinName pin)
8989
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_CLKP;
9090
PeriphClkInitStruct.PLL2.PLL2P = 4;
9191
#if defined(DUAL_CORE)
92-
uint32_t timeout = HSEM_TIMEOUT;
93-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
92+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
9493
}
9594
#endif /* DUAL_CORE */
9695
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);

‎targets/TARGET_STM/TARGET_STM32H7/flash_api.c

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,7 @@ static uint32_t GetSectorBase(uint32_t SectorId, uint32_t BanksId);
2828
int32_t flash_init(flash_t *obj)
2929
{
3030
#if defined(DUAL_CORE)
31-
uint32_t timeout = HSEM_TIMEOUT;
32-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID) && (--timeout != 0)) {
31+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID)) {
3332
}
3433
#endif /* DUAL_CORE */
3534
/* Clear pending flags (if any) */
@@ -58,8 +57,7 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
5857
}
5958

6059
#if defined(DUAL_CORE)
61-
uint32_t timeout = HSEM_TIMEOUT;
62-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID) && (--timeout != 0)) {
60+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID)) {
6361
}
6462
#endif /* DUAL_CORE */
6563
if (HAL_FLASH_Unlock() != HAL_OK) {
@@ -121,8 +119,7 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
121119
}
122120

123121
#if defined(DUAL_CORE)
124-
uint32_t timeout = HSEM_TIMEOUT;
125-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID) && (--timeout != 0)) {
122+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID)) {
126123
}
127124
#endif /* DUAL_CORE */
128125
if (HAL_FLASH_Unlock() != HAL_OK) {

‎targets/TARGET_STM/TARGET_STM32H7/pin_device.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,7 @@ static inline void stm_pin_DisconnectDebug(PinName pin)
4545
static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
4646
{
4747
#if defined(DUAL_CORE)
48-
uint32_t timeout = HSEM_TIMEOUT;
49-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
48+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
5049
}
5150
#endif /* DUAL_CORE */
5251

@@ -72,8 +71,7 @@ static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t af
7271
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
7372

7473
#if defined(DUAL_CORE)
75-
uint32_t timeout = HSEM_TIMEOUT;
76-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
74+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
7775
}
7876
#endif /* DUAL_CORE */
7977

‎targets/TARGET_STM/can_api.c

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -91,8 +91,7 @@ void can_init_freq(can_t *obj, PinName rd, PinName td, int hz)
9191
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN;
9292
RCC_PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL; // 10 MHz (RCC_OscInitStruct.PLL.PLLQ = 80)
9393
#if defined(DUAL_CORE)
94-
uint32_t timeout = HSEM_TIMEOUT;
95-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
94+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
9695
}
9796
#endif /* DUAL_CORE */
9897
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
@@ -190,8 +189,7 @@ void can_irq_free(can_t *obj)
190189
void can_free(can_t *obj)
191190
{
192191
#if defined(DUAL_CORE)
193-
uint32_t timeout = HSEM_TIMEOUT;
194-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
192+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
195193
}
196194
#endif /* DUAL_CORE */
197195
__HAL_RCC_FDCAN_FORCE_RESET();
@@ -638,8 +636,7 @@ void can_free(can_t *obj)
638636
{
639637
CANName can = (CANName) obj->CanHandle.Instance;
640638
#if defined(DUAL_CORE)
641-
uint32_t timeout = HSEM_TIMEOUT;
642-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
639+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
643640
}
644641
#endif /* DUAL_CORE */
645642
// Reset CAN and disable clock

‎targets/TARGET_STM/gpio_api.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -156,8 +156,7 @@ void gpio_mode(gpio_t *obj, PinMode mode)
156156
inline void gpio_dir(gpio_t *obj, PinDirection direction)
157157
{
158158
#if defined(DUAL_CORE)
159-
uint32_t timeout = HSEM_TIMEOUT;
160-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
159+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
161160
}
162161
#endif /* DUAL_CORE */
163162

‎targets/TARGET_STM/gpio_object.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,8 +58,7 @@ typedef struct {
5858
static inline void gpio_write(gpio_t *obj, int value)
5959
{
6060
#if defined(DUAL_CORE)
61-
uint32_t timeout = HSEM_TIMEOUT;
62-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
61+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
6362
}
6463
#endif /* DUAL_CORE */
6564

‎targets/TARGET_STM/i2c_api.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -215,8 +215,7 @@ void i2c_hw_reset(i2c_t *obj)
215215
timeout = BYTE_TIMEOUT;
216216
while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
217217
#if defined(DUAL_CORE)
218-
timeout = HSEM_TIMEOUT;
219-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
218+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
220219
}
221220
#endif /* DUAL_CORE */
222221
#if defined I2C1_BASE
@@ -422,8 +421,7 @@ void i2c_frequency(i2c_t *obj, int hz)
422421

423422
/*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/
424423
#if defined(DUAL_CORE)
425-
timeout = HSEM_TIMEOUT;
426-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
424+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
427425
}
428426
#endif /* DUAL_CORE */
429427
#if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG)

‎targets/TARGET_STM/lp_ticker.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -205,8 +205,7 @@ void lp_ticker_init(void)
205205

206206
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
207207
#if defined(DUAL_CORE)
208-
uint32_t timeout = HSEM_TIMEOUT;
209-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
208+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
210209
}
211210
#endif /* DUAL_CORE */
212211
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {

‎targets/TARGET_STM/pinmap.c

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -81,8 +81,7 @@ void pin_function(PinName pin, int data)
8181
if (mode == STM_PIN_OUTPUT) {
8282
#endif
8383
#if defined(DUAL_CORE)
84-
uint32_t timeout = HSEM_TIMEOUT;
85-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
84+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
8685
}
8786
#endif /* DUAL_CORE */
8887
switch (speed) {
@@ -126,7 +125,7 @@ void pin_function(PinName pin, int data)
126125
}
127126

128127
#if defined(DUAL_CORE)
129-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
128+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
130129
}
131130
#endif /* DUAL_CORE */
132131

@@ -172,8 +171,7 @@ void pin_mode(PinName pin, PinMode mode)
172171
GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
173172

174173
#if defined(DUAL_CORE)
175-
uint32_t timeout = HSEM_TIMEOUT;
176-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID) && (--timeout != 0)) {
174+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
177175
}
178176
#endif /* DUAL_CORE */
179177

‎targets/TARGET_STM/qspi_api.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -499,8 +499,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
499499

500500
// Reset QSPI
501501
#if defined(DUAL_CORE)
502-
uint32_t timeout = HSEM_TIMEOUT;
503-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
502+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
504503
}
505504
#endif /* DUAL_CORE */
506505
__HAL_RCC_QSPI_FORCE_RESET();
@@ -607,8 +606,7 @@ qspi_status_t qspi_free(qspi_t *obj)
607606

608607
// Reset QSPI
609608
#if defined(DUAL_CORE)
610-
uint32_t timeout = HSEM_TIMEOUT;
611-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
609+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
612610
}
613611
#endif /* DUAL_CORE */
614612
__HAL_RCC_QSPI_FORCE_RESET();

‎targets/TARGET_STM/rtc_api.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,8 +59,7 @@ void rtc_init(void)
5959
HAL_PWR_EnableBkUpAccess();
6060

6161
#if defined(DUAL_CORE)
62-
uint32_t timeout = HSEM_TIMEOUT;
63-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
62+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
6463
}
6564
#endif /* DUAL_CORE */
6665
#if MBED_CONF_TARGET_LSE_AVAILABLE

‎targets/TARGET_STM/serial_api.c

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -211,8 +211,7 @@ void serial_free(serial_t *obj)
211211

212212
// Reset UART and disable clock
213213
#if defined(DUAL_CORE)
214-
uint32_t timeout = HSEM_TIMEOUT;
215-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
214+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
216215
}
217216
#endif /* DUAL_CORE */
218217
#if defined(USART1_BASE)
@@ -365,8 +364,7 @@ void serial_baud(serial_t *obj, int baudrate)
365364
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
366365
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
367366
#if defined(DUAL_CORE)
368-
uint32_t timeout = HSEM_TIMEOUT;
369-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
367+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
370368
}
371369
#endif /* DUAL_CORE */
372370
HAL_RCC_OscConfig(&RCC_OscInitStruct);
@@ -377,8 +375,7 @@ void serial_baud(serial_t *obj, int baudrate)
377375
// Keep it to verify if HAL_RCC_OscConfig didn't exit with a timeout
378376
if (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY)) {
379377
#if defined(DUAL_CORE)
380-
uint32_t timeout = HSEM_TIMEOUT;
381-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
378+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
382379
}
383380
#endif /* DUAL_CORE */
384381
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_LSE;
@@ -408,8 +405,7 @@ void serial_baud(serial_t *obj, int baudrate)
408405
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_OFF;
409406
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
410407
#if defined(DUAL_CORE)
411-
uint32_t timeout = HSEM_TIMEOUT;
412-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
408+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
413409
}
414410
#endif /* DUAL_CORE */
415411
HAL_RCC_OscConfig(&RCC_OscInitStruct);
@@ -421,8 +417,7 @@ void serial_baud(serial_t *obj, int baudrate)
421417
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY)) {
422418
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
423419
#if defined(DUAL_CORE)
424-
uint32_t timeout = HSEM_TIMEOUT;
425-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
420+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
426421
}
427422
#endif /* DUAL_CORE */
428423
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
@@ -437,8 +432,7 @@ void serial_baud(serial_t *obj, int baudrate)
437432
// Last chance using SYSCLK
438433
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_SYSCLK;
439434
#if defined(DUAL_CORE)
440-
uint32_t timeout = HSEM_TIMEOUT;
441-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
435+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
442436
}
443437
#endif /* DUAL_CORE */
444438
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);

‎targets/TARGET_STM/sleep.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58,8 +58,7 @@ static void ForcePeriphOutofDeepSleep(void)
5858
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
5959

6060
#if defined(DUAL_CORE)
61-
uint32_t timeout = HSEM_TIMEOUT;
62-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
61+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
6362
}
6463
#endif /* DUAL_CORE */
6564
/* Get the Clocks configuration according to the internal RCC registers */
@@ -100,8 +99,7 @@ static void ForceOscOutofDeepSleep(void)
10099
__HAL_RCC_PWR_CLK_ENABLE();
101100

102101
#if defined(DUAL_CORE)
103-
uint32_t timeout = HSEM_TIMEOUT;
104-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
102+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
105103
}
106104
#endif /* DUAL_CORE */
107105
/* Get the Oscillators configuration according to the internal RCC registers */

‎targets/TARGET_STM/stm_spi_api.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -236,8 +236,7 @@ void spi_free(spi_t *obj)
236236
HAL_SPI_DeInit(handle);
237237

238238
#if defined(DUAL_CORE)
239-
uint32_t timeout = HSEM_TIMEOUT;
240-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
239+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
241240
}
242241
#endif /* DUAL_CORE */
243242
#if defined SPI1_BASE

‎targets/TARGET_STM/trng_api.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,8 +54,7 @@ void trng_init(trng_t *obj)
5454
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
5555
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
5656
#if defined(DUAL_CORE)
57-
uint32_t timeout = HSEM_TIMEOUT;
58-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
57+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
5958
}
6059
#endif /* DUAL_CORE */
6160
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {

‎targets/TARGET_STM/us_ticker.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -76,8 +76,7 @@ void init_16bit_timer(void)
7676

7777
// Reset timer
7878
#if defined(DUAL_CORE)
79-
uint32_t timeout = HSEM_TIMEOUT;
80-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
79+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
8180
}
8281
#endif /* DUAL_CORE */
8382
TIM_MST_RESET_ON;
@@ -170,8 +169,7 @@ void init_32bit_timer(void)
170169

171170
// Reset timer
172171
#if defined(DUAL_CORE)
173-
uint32_t timeout = HSEM_TIMEOUT;
174-
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID) && (--timeout != 0)) {
172+
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
175173
}
176174
#endif /* DUAL_CORE */
177175
TIM_MST_RESET_ON;

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