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Merge pull request #10624 from artokin/prepare_for_mbedos513
Nanostack release for Mbed OS 5.13
2 parents 319a82d + 07aac7b commit b2abfc3

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components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp

Lines changed: 68 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,6 @@ extern void (*fhss_bc_switch)(void);
7979
#define MAC_TYPE_ACK (2)
8080
#define MAC_TYPE_COMMAND (3)
8181
#define MAC_DATA_PENDING 0x10
82-
#define MAC_FRAME_VERSION_2 (2)
8382
#define FC_DST_MODE 0x0C
8483
#define FC_SRC_MODE 0xC0
8584
#define FC_DST_ADDR_NONE 0x00
@@ -99,8 +98,6 @@ extern void (*fhss_bc_switch)(void);
9998
#define CS_SELECT() {rf->CS = 0;}
10099
#define CS_RELEASE() {rf->CS = 1;}
101100

102-
extern const uint8_t ADDR_UNSPECIFIED[16];
103-
104101
typedef enum {
105102
RF_MODE_NORMAL = 0,
106103
RF_MODE_SNIFFER = 1
@@ -183,6 +180,7 @@ static void rf_backup_timer_stop(void);
183180
static void rf_rx_ready_handler(void);
184181
static uint32_t read_irq_status(void);
185182
static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *mac_16bit_addr, uint8_t *pan_id);
183+
static void rf_cca_timer_start(uint32_t slots);
186184

187185
static RFPins *rf;
188186
static phy_device_driver_s device_driver;
@@ -210,6 +208,7 @@ static uint8_t s2lp_MAC[8];
210208
static rf_mode_e rf_mode = RF_MODE_NORMAL;
211209
static bool rf_update_config = false;
212210
static uint16_t cur_packet_len = 0xffff;
211+
static uint32_t receiver_ready_timestamp;
213212

214213
/* Channel configurations for sub-GHz */
215214
static phy_rf_channel_configuration_s phy_subghz = {
@@ -748,16 +747,26 @@ static void rf_start_tx(void)
748747
rf_backup_timer_start(MAX_PACKET_SENDING_TIME);
749748
}
750749

750+
static int rf_cca_check(void)
751+
{
752+
uint32_t time_from_receiver_ready = rf_get_timestamp() - receiver_ready_timestamp;
753+
if (time_from_receiver_ready < RSSI_SETTLING_TIME) {
754+
wait_us(RSSI_SETTLING_TIME - time_from_receiver_ready);
755+
}
756+
return (rf_read_register(LINK_QUALIF1) & CARRIER_SENSE);
757+
}
758+
751759
static void rf_cca_timer_interrupt(void)
752760
{
753-
if (device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0, 0) != 0) {
761+
int8_t status = device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0, 0);
762+
if (status == PHY_TX_NOT_ALLOWED) {
754763
rf_flush_tx_fifo();
755764
if (rf_state == RF_CSMA_STARTED) {
756765
rf_state = RF_IDLE;
757766
}
758767
return;
759768
}
760-
if ((cca_enabled == true) && ((rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE) || (read_irq_status() & (1 << SYNC_WORD)) || (rf_read_register(LINK_QUALIF1) & CARRIER_SENSE))) {
769+
if ((cca_enabled == true) && ((rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE) || (read_irq_status() & (1 << SYNC_WORD)) || rf_cca_check())) {
761770
if (rf_state == RF_CSMA_STARTED) {
762771
rf_state = RF_IDLE;
763772
}
@@ -767,9 +776,23 @@ static void rf_cca_timer_interrupt(void)
767776
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
768777
}
769778
} else {
770-
rf_start_tx();
771-
rf_state = RF_TX_STARTED;
772-
TEST_TX_STARTED
779+
if (status == PHY_RESTART_CSMA) {
780+
if (device_driver.phy_tx_done_cb) {
781+
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_OK, 0, 0);
782+
}
783+
if (tx_time) {
784+
uint32_t backoff_time = tx_time - rf_get_timestamp();
785+
// Max. time to TX can be 65ms, otherwise time has passed already -> send immediately
786+
if (backoff_time > 65000) {
787+
backoff_time = 1;
788+
}
789+
rf_cca_timer_start(backoff_time);
790+
}
791+
} else {
792+
rf_start_tx();
793+
rf_state = RF_TX_STARTED;
794+
TEST_TX_STARTED
795+
}
773796
}
774797
}
775798

@@ -931,6 +954,8 @@ static void rf_sync_detected_handler(void)
931954
rf_state = RF_RX_STARTED;
932955
TEST_RX_STARTED
933956
rf_disable_interrupt(SYNC_WORD);
957+
rf_enable_interrupt(RX_FIFO_ALMOST_FULL);
958+
rf_enable_interrupt(RX_DATA_READY);
934959
rf_backup_timer_start(MAX_PACKET_SENDING_TIME);
935960
}
936961

@@ -953,15 +978,14 @@ static void rf_receive(uint8_t rx_channel)
953978
rf_rx_channel = rf_new_channel = rx_channel;
954979
}
955980
rf_send_command(S2LP_CMD_RX);
956-
rf_poll_state_change(S2LP_STATE_RX);
957981
rf_enable_interrupt(SYNC_WORD);
958-
rf_enable_interrupt(RX_FIFO_ALMOST_FULL);
959-
rf_enable_interrupt(RX_DATA_READY);
960982
rf_enable_interrupt(RX_FIFO_UNF_OVF);
961983
rx_data_length = 0;
962984
if (rf_state != RF_CSMA_STARTED) {
963985
rf_state = RF_IDLE;
964986
}
987+
rf_poll_state_change(S2LP_STATE_RX);
988+
receiver_ready_timestamp = rf_get_timestamp();
965989
rf_unlock();
966990
}
967991

@@ -1158,14 +1182,25 @@ int8_t NanostackRfPhys2lp::rf_register()
11581182
error("Multiple registrations of NanostackRfPhyAtmel not supported");
11591183
return -1;
11601184
}
1161-
if (memcmp(_mac_addr, ADDR_UNSPECIFIED, 8) == 0) {
1185+
1186+
if (!_mac_set) {
1187+
#ifdef AT24MAC
1188+
int ret = _mac.read_eui64((void *)s2lp_MAC);
1189+
if (ret < 0) {
1190+
rf = NULL;
1191+
rf_unlock();
1192+
return -1;
1193+
}
1194+
#else
11621195
randLIB_seed_random();
11631196
randLIB_get_n_bytes_random(s2lp_MAC, 8);
11641197
s2lp_MAC[0] |= 2; //Set Local Bit
11651198
s2lp_MAC[0] &= ~1; //Clear multicast bit
1166-
tr_info("Generated random MAC %s", trace_array(s2lp_MAC, 8));
1199+
#endif
11671200
set_mac_address(s2lp_MAC);
1201+
tr_info("MAC address: %s", trace_array(_mac_addr, 8));
11681202
}
1203+
11691204
rf = _rf;
11701205

11711206
int8_t radio_id = rf_device_register(_mac_addr);
@@ -1188,12 +1223,20 @@ void NanostackRfPhys2lp::rf_unregister()
11881223
rf_unlock();
11891224
}
11901225

1191-
NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn,
1226+
NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
11921227
#ifdef TEST_GPIOS_ENABLED
1193-
PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5,
1228+
,PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5
11941229
#endif //TEST_GPIOS_ENABLED
1195-
PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3)
1196-
: _mac_addr(), _rf(NULL), _mac_set(false),
1230+
,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
1231+
#ifdef AT24MAC
1232+
,PinName i2c_sda, PinName i2c_scl
1233+
#endif //AT24MAC
1234+
)
1235+
:
1236+
#ifdef AT24MAC
1237+
_mac(i2c_sda, i2c_scl),
1238+
#endif //AT24MAC
1239+
_mac_addr(), _rf(NULL), _mac_set(false),
11971240
_spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn),
11981241
#ifdef TEST_GPIOS_ENABLED
11991242
_spi_test1(spi_test1), _spi_test2(spi_test2), _spi_test3(spi_test3), _spi_test4(spi_test4), _spi_test5(spi_test5),
@@ -1236,20 +1279,6 @@ static bool rf_panid_filter_common(uint8_t *panid_start, uint8_t *pan_id, uint8_
12361279
return retval;
12371280
}
12381281

1239-
static bool rf_panid_v2_filter(uint8_t *ptr, uint8_t *pan_id, uint8_t dst_mode, uint8_t src_mode, uint8_t seq_compressed, uint8_t panid_compressed, uint8_t frame_type)
1240-
{
1241-
if ((dst_mode == FC_DST_ADDR_NONE) && (frame_type == MAC_TYPE_DATA || frame_type == MAC_TYPE_COMMAND)) {
1242-
return true;
1243-
}
1244-
if ((dst_mode == FC_DST_64_BITS) && (src_mode == FC_SRC_64_BITS) && panid_compressed) {
1245-
return true;
1246-
}
1247-
if (seq_compressed) {
1248-
ptr--;
1249-
}
1250-
return rf_panid_filter_common(ptr, pan_id, frame_type);
1251-
}
1252-
12531282
static bool rf_panid_v1_v0_filter(uint8_t *ptr, uint8_t *pan_id, uint8_t frame_type)
12541283
{
12551284
return rf_panid_filter_common(ptr, pan_id, frame_type);
@@ -1298,17 +1327,6 @@ static bool rf_addr_filter_common(uint8_t *ptr, uint8_t addr_mode, uint8_t *mac_
12981327
return retval;
12991328
}
13001329

1301-
static bool rf_addr_v2_filter(uint8_t *ptr, uint8_t *mac_64bit_addr, uint8_t *mac_16bit_addr, uint8_t dst_mode, uint8_t seq_compressed, uint8_t panid_compressed)
1302-
{
1303-
if (seq_compressed) {
1304-
ptr--;
1305-
}
1306-
if (panid_compressed) {
1307-
ptr -= 2;
1308-
}
1309-
return rf_addr_filter_common(ptr, dst_mode, mac_64bit_addr, mac_16bit_addr);
1310-
}
1311-
13121330
static bool rf_addr_v1_v0_filter(uint8_t *ptr, uint8_t *mac_64bit_addr, uint8_t *mac_16bit_addr, uint8_t dst_mode)
13131331
{
13141332
return rf_addr_filter_common(ptr, dst_mode, mac_64bit_addr, mac_16bit_addr);
@@ -1317,19 +1335,9 @@ static bool rf_addr_v1_v0_filter(uint8_t *ptr, uint8_t *mac_64bit_addr, uint8_t
13171335
static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *mac_16bit_addr, uint8_t *pan_id)
13181336
{
13191337
uint8_t dst_mode = (mac_header[1] & FC_DST_MODE);
1320-
uint8_t src_mode = (mac_header[1] & FC_SRC_MODE);
1321-
uint8_t seq_compressed = ((mac_header[1] & FC_SEQUENCE_COMPRESSION) >> SHIFT_SEQ_COMP_FIELD);
1322-
uint8_t panid_compressed = ((mac_header[0] & FC_PAN_ID_COMPRESSION) >> SHIFT_PANID_COMP_FIELD);
13231338
uint8_t frame_type = mac_header[0] & MAC_FRAME_TYPE_MASK;
13241339
uint8_t version = ((mac_header[1] & VERSION_FIELD_MASK) >> SHIFT_VERSION_FIELD);
1325-
if (version == MAC_FRAME_VERSION_2) {
1326-
if (!rf_panid_v2_filter(mac_header + OFFSET_DST_PAN_ID, pan_id, dst_mode, src_mode, seq_compressed, panid_compressed, frame_type)) {
1327-
return false;
1328-
}
1329-
if (!rf_addr_v2_filter(mac_header + OFFSET_DST_ADDR, mac_64bit_addr, mac_16bit_addr, dst_mode, seq_compressed, panid_compressed)) {
1330-
return false;
1331-
}
1332-
} else {
1340+
if (version != MAC_FRAME_VERSION_2) {
13331341
if (!rf_panid_v1_v0_filter(mac_header + OFFSET_DST_PAN_ID, pan_id, frame_type)) {
13341342
return false;
13351343
}
@@ -1474,11 +1482,15 @@ static void rf_print_registers(void)
14741482
#if MBED_CONF_S2LP_PROVIDE_DEFAULT
14751483
NanostackRfPhy &NanostackRfPhy::get_default_instance()
14761484
{
1477-
static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN,
1485+
static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN
14781486
#ifdef TEST_GPIOS_ENABLED
1479-
S2LP_SPI_TEST1, S2LP_SPI_TEST2, S2LP_SPI_TEST3, S2LP_SPI_TEST4, S2LP_SPI_TEST5,
1487+
,S2LP_SPI_TEST1, S2LP_SPI_TEST2, S2LP_SPI_TEST3, S2LP_SPI_TEST4, S2LP_SPI_TEST5
14801488
#endif //TEST_GPIOS_ENABLED
1481-
S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3);
1489+
,S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3
1490+
#ifdef AT24MAC
1491+
,S2LP_I2C_SDA, S2LP_I2C_SCL
1492+
#endif //AT24MAC
1493+
);
14821494
return rf_phy;
14831495
}
14841496
#endif // MBED_CONF_S2LP_PROVIDE_DEFAULT
Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
1+
/*
2+
* Copyright (c) 2019-2019 ARM Limited. All rights reserved.
3+
* SPDX-License-Identifier: Apache-2.0
4+
* Licensed under the Apache License, Version 2.0 (the License); you may
5+
* not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
12+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#include "NanostackRfPhys2lp.h"
17+
#include "at24mac_s2lp.h"
18+
19+
20+
#if DEVICE_I2C
21+
#ifdef AT24MAC
22+
23+
/* Device addressing */
24+
#define AT24MAC_EEPROM_ADDRESS (0x0A<<4)
25+
#define AT24MAC_RW_PROTECT_ADDRESS (0x06<<4)
26+
#define AT24MAC_SERIAL_ADDRESS (0x0B<<4)
27+
28+
/* Known memory blocks */
29+
#define AT24MAC_SERIAL_OFFSET (0x80)
30+
#define AT24MAC_EUI64_OFFSET (0x98)
31+
#define AT24MAC_EUI48_OFFSET (0x9A)
32+
33+
#define SERIAL_LEN 16
34+
#define EUI64_LEN 8
35+
#define EUI48_LEN 6
36+
37+
using namespace mbed;
38+
39+
AT24Mac_s2lp::AT24Mac_s2lp(PinName sda, PinName scl) : _i2c(sda, scl)
40+
{
41+
// Do nothing
42+
}
43+
44+
int AT24Mac_s2lp::read_serial(void *buf)
45+
{
46+
char offset = AT24MAC_SERIAL_OFFSET;
47+
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
48+
return -1; //No ACK
49+
}
50+
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, SERIAL_LEN);
51+
}
52+
53+
int AT24Mac_s2lp::read_eui64(void *buf)
54+
{
55+
char offset = AT24MAC_EUI64_OFFSET;
56+
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
57+
return -1; //No ACK
58+
}
59+
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI64_LEN);
60+
}
61+
62+
int AT24Mac_s2lp::read_eui48(void *buf)
63+
{
64+
char offset = AT24MAC_EUI48_OFFSET;
65+
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
66+
return -1; //No ACK
67+
}
68+
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI48_LEN);
69+
}
70+
71+
#endif /* AT24MAC */
72+
#endif /* DEVICE_I2C */
Lines changed: 71 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,71 @@
1+
/*
2+
* Copyright (c) 2019-2019 ARM Limited. All rights reserved.
3+
* SPDX-License-Identifier: Apache-2.0
4+
* Licensed under the Apache License, Version 2.0 (the License); you may
5+
* not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
12+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#ifndef AT24MAC_S2LP_H
17+
#define AT24MAC_S2LP_H
18+
19+
#include "PinNames.h"
20+
21+
#if DEVICE_I2C
22+
#ifdef AT24MAC
23+
24+
#include "I2C.h"
25+
#include "drivers/DigitalInOut.h"
26+
#include "platform/mbed_wait_api.h"
27+
28+
/*
29+
* AT24MAC drivers.
30+
*
31+
* This is a EEPROM chip designed to contain factory programmed read-only EUI-64 or EUI-48,
32+
* a 128bit serial number and some user programmable EEPROM.
33+
*
34+
* AT24MAC602 contains EUI-64, use read_eui64()
35+
* AT24MAC402 contains EUI-64, use read_eui48()
36+
*
37+
* NOTE: You cannot use both EUI-64 and EUI-48. Chip contains only one of those.
38+
*/
39+
40+
class AT24Mac_s2lp {
41+
public:
42+
AT24Mac_s2lp(PinName sda, PinName scl);
43+
44+
/**
45+
* Read unique serial number from chip.
46+
* \param buf pointer to write serial number to. Must have space for 16 bytes.
47+
* \return zero on success, negative number on failure
48+
*/
49+
int read_serial(void *buf);
50+
51+
/**
52+
* Read EUI-64 from chip.
53+
* \param buf pointer to write EUI-64 to. Must have space for 8 bytes.
54+
* \return zero on success, negative number on failure
55+
*/
56+
int read_eui64(void *buf);
57+
58+
/**
59+
* Read EUI-48 from chip.
60+
* \param buf pointer to write EUI-48 to. Must have space for 6 bytes.
61+
* \return zero on success, negative number on failure
62+
*/
63+
int read_eui48(void *buf);
64+
65+
private:
66+
mbed::I2C _i2c;
67+
};
68+
69+
#endif /* AT24MAC */
70+
#endif /* DEVICE_I2C */
71+
#endif /* AT24MAC_S2LP_H */

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