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[NUCLEO_F103RB] Many improvements
- Add more USART, SPI, I2C, PWM and AnalogIn pins - Use TIM4 instead of TIM1 for the ticker
1 parent 9daf443 commit b5d4979

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10 files changed

+271
-116
lines changed

10 files changed

+271
-116
lines changed

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -147,8 +147,6 @@ __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}
147147
* @{
148148
*/
149149

150-
void SetSysClock(void);
151-
152150
#if (USE_PLL_HSE_XTAL != 0) || (USE_PLL_HSE_EXTC != 0)
153151
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
154152
#endif
@@ -223,15 +221,15 @@ void SystemInit (void)
223221
#endif /* DATA_IN_ExtSRAM */
224222
#endif
225223

226-
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
227-
/* Configure the Flash Latency cycles and enable prefetch buffer */
228-
SetSysClock();
229-
230224
#ifdef VECT_TAB_SRAM
231225
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
232226
#else
233227
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
234-
#endif
228+
#endif
229+
230+
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
231+
/* Configure the Flash Latency cycles and enable prefetch buffer */
232+
SetSysClock();
235233
}
236234

237235
/**
@@ -609,3 +607,4 @@ uint8_t SetSysClock_PLL_HSI(void)
609607
*/
610608

611609
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
610+

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,8 @@ extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Cloc
9393

9494
extern void SystemInit(void);
9595
extern void SystemCoreClockUpdate(void);
96+
extern void SetSysClock(void);
97+
9698
/**
9799
* @}
98100
*/

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,13 +37,13 @@ extern "C" {
3737
#endif
3838

3939
typedef enum {
40-
ADC_1 = (int)ADC1_BASE,
41-
ADC_2 = (int)ADC2_BASE
40+
ADC_1 = (int)ADC1_BASE
4241
} ADCName;
4342

4443
typedef enum {
4544
UART_1 = (int)USART1_BASE,
46-
UART_2 = (int)USART2_BASE
45+
UART_2 = (int)USART2_BASE,
46+
UART_3 = (int)USART3_BASE
4747
} UARTName;
4848

4949
#define STDIO_UART_TX PA_2
@@ -61,6 +61,7 @@ typedef enum {
6161
} I2CName;
6262

6363
typedef enum {
64+
PWM_1 = (int)TIM1_BASE,
6465
PWM_2 = (int)TIM2_BASE,
6566
PWM_3 = (int)TIM3_BASE,
6667
PWM_4 = (int)TIM4_BASE

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/analogin_api.c

Lines changed: 65 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -35,12 +35,22 @@
3535
#include "error.h"
3636

3737
static const PinMap PinMap_ADC[] = {
38-
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
39-
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
40-
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
41-
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
42-
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
43-
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)},
38+
{PA_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN0
39+
{PA_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN1
40+
{PA_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN2
41+
{PA_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN3
42+
{PA_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN4
43+
{PA_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN5
44+
{PA_6, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN6
45+
{PA_7, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN7
46+
{PB_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN8
47+
{PB_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN9
48+
{PC_0, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN10
49+
{PC_1, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN11
50+
{PC_2, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN12
51+
{PC_3, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN13
52+
{PC_4, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN14
53+
{PC_5, ADC_1, STM_PIN_DATA(GPIO_Mode_AIN, 0)}, // ADC12_IN15
4454
{NC, NC, 0}
4555
};
4656

@@ -51,7 +61,7 @@ void analogin_init(analogin_t *obj, PinName pin) {
5161
ADC_TypeDef *adc;
5262
ADC_InitTypeDef ADC_InitStructure;
5363

54-
// Get the peripheral name (ADC_1, ADC_2...) from the pin and assign it to the object
64+
// Get the peripheral name from the pin and assign it to the object
5565
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
5666

5767
if (obj->adc == (ADCName)NC) {
@@ -71,17 +81,18 @@ void analogin_init(analogin_t *obj, PinName pin) {
7181
// Get ADC registers structure address
7282
adc = (ADC_TypeDef *)(obj->adc);
7383

74-
// Enable ADC clock
75-
RCC_ADCCLKConfig(RCC_PCLK2_Div4);
84+
// Enable ADC clock (14 MHz maximum)
85+
// PCLK2 = 64 MHz --> ADC clock = 64/6 = 10.666 MHz
86+
RCC_ADCCLKConfig(RCC_PCLK2_Div6);
7687
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
7788

7889
// Configure ADC
79-
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
80-
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
90+
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
91+
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
8192
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
82-
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
83-
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
84-
ADC_InitStructure.ADC_NbrOfChannel = 1;
93+
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
94+
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
95+
ADC_InitStructure.ADC_NbrOfChannel = 1;
8596
ADC_Init(adc, &ADC_InitStructure);
8697

8798
// Enable ADC
@@ -98,31 +109,64 @@ void analogin_init(analogin_t *obj, PinName pin) {
98109
static inline uint16_t adc_read(analogin_t *obj) {
99110
// Get ADC registers structure address
100111
ADC_TypeDef *adc = (ADC_TypeDef *)(obj->adc);
112+
int channel = 0;
101113

102114
// Configure ADC channel
103115
switch (obj->pin) {
104116
case PA_0:
105-
ADC_RegularChannelConfig(adc, ADC_Channel_0, 1, ADC_SampleTime_7Cycles5);
117+
channel = 0;
106118
break;
107119
case PA_1:
108-
ADC_RegularChannelConfig(adc, ADC_Channel_1, 1, ADC_SampleTime_7Cycles5);
120+
channel = 1;
109121
break;
122+
case PA_2:
123+
channel = 2;
124+
break;
125+
case PA_3:
126+
channel = 3;
127+
break;
110128
case PA_4:
111-
ADC_RegularChannelConfig(adc, ADC_Channel_4, 1, ADC_SampleTime_7Cycles5);
129+
channel = 4;
130+
break;
131+
case PA_5:
132+
channel = 5;
112133
break;
134+
case PA_6:
135+
channel = 6;
136+
break;
137+
case PA_7:
138+
channel = 7;
139+
break;
113140
case PB_0:
114-
ADC_RegularChannelConfig(adc, ADC_Channel_8, 1, ADC_SampleTime_7Cycles5);
141+
channel = 8;
142+
break;
143+
case PB_1:
144+
channel = 9;
145+
break;
146+
case PC_0:
147+
channel = 10;
115148
break;
116149
case PC_1:
117-
ADC_RegularChannelConfig(adc, ADC_Channel_11, 1, ADC_SampleTime_7Cycles5);
150+
channel = 11;
118151
break;
119-
case PC_0:
120-
ADC_RegularChannelConfig(adc, ADC_Channel_10, 1, ADC_SampleTime_7Cycles5);
152+
case PC_2:
153+
channel = 12;
154+
break;
155+
case PC_3:
156+
channel = 13;
121157
break;
158+
case PC_4:
159+
channel = 14;
160+
break;
161+
case PC_5:
162+
channel = 15;
163+
break;
122164
default:
123165
return 0;
124166
}
125167

168+
ADC_RegularChannelConfig(adc, channel, 1, ADC_SampleTime_7Cycles5);
169+
126170
ADC_SoftwareStartConvCmd(adc, ENABLE); // Start conversion
127171

128172
while(ADC_GetFlagStatus(adc, ADC_FLAG_EOC) == RESET); // Wait end of conversion

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/i2c_api.c

Lines changed: 11 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -42,12 +42,16 @@
4242
#define LONG_TIMEOUT ((int)0x8000)
4343

4444
static const PinMap PinMap_I2C_SDA[] = {
45-
{PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 8)}, // GPIO_Remap_I2C1
45+
{PB_7, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 0)},
46+
{PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 2)}, // GPIO_Remap_I2C1
47+
{PB_11, I2C_2, STM_PIN_DATA(GPIO_Mode_AF_OD, 0)},
4648
{NC, NC, 0}
4749
};
4850

4951
static const PinMap PinMap_I2C_SCL[] = {
50-
{PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 8)}, // GPIO_Remap_I2C1
52+
{PB_6, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 0)},
53+
{PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 2)}, // GPIO_Remap_I2C1
54+
{PB_10, I2C_2, STM_PIN_DATA(GPIO_Mode_AF_OD, 0)},
5155
{NC, NC, 0}
5256
};
5357

@@ -91,12 +95,12 @@ void i2c_frequency(i2c_t *obj, int hz) {
9195
I2C_DeInit(i2c);
9296

9397
// I2C configuration
94-
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
95-
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
96-
I2C_InitStructure.I2C_OwnAddress1 = 0;
97-
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
98+
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
99+
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
100+
I2C_InitStructure.I2C_OwnAddress1 = 0;
101+
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
98102
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
99-
I2C_InitStructure.I2C_ClockSpeed = hz;
103+
I2C_InitStructure.I2C_ClockSpeed = hz;
100104
I2C_Init(i2c, &I2C_InitStructure);
101105

102106
I2C_Cmd(i2c, ENABLE);

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/mbed_overrides.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,8 +25,7 @@
2525
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2626
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2727
*/
28-
29-
extern void SystemCoreClockUpdate(void);
28+
#include "cmsis.h"
3029

3130
// This function is called after RAM initialization and before main.
3231
void mbed_sdk_init() {

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pinmap.c

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -32,16 +32,18 @@
3232
#include "error.h"
3333

3434
// Alternate-function mapping
35-
static const uint32_t AF_mapping[] = {
36-
0, // 0 = No AF
37-
GPIO_Remap_SPI1, // 1
38-
GPIO_Remap_I2C1, // 2
39-
GPIO_Remap_USART1, // 3
40-
GPIO_Remap_USART2, // 4
41-
GPIO_FullRemap_TIM2, // 5
42-
GPIO_FullRemap_TIM3, // 6
43-
GPIO_PartialRemap_TIM3, // 7
44-
GPIO_Remap_I2C1 // 8
35+
#define AF_NUM (10)
36+
static const uint32_t AF_mapping[AF_NUM] = {
37+
0, // 0 = No AF
38+
GPIO_Remap_SPI1, // 1
39+
GPIO_Remap_I2C1, // 2
40+
GPIO_Remap_USART1, // 3
41+
GPIO_Remap_USART2, // 4
42+
GPIO_PartialRemap_USART3, // 5
43+
GPIO_PartialRemap_TIM1, // 6
44+
GPIO_PartialRemap_TIM3, // 7
45+
GPIO_FullRemap_TIM2, // 8
46+
GPIO_FullRemap_TIM3 // 9
4547
};
4648

4749
// Enable GPIO clock and return GPIO base address
@@ -93,7 +95,7 @@ void pin_function(PinName pin, int data) {
9395

9496
// Configure Alternate Function
9597
// Warning: Must be done before the GPIO is initialized
96-
if (afnum > 0) {
98+
if ((afnum > 0) && (afnum < AF_NUM)) {
9799
GPIO_PinRemapConfig(AF_mapping[afnum], ENABLE);
98100
}
99101

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