|
| 1 | +/* Copyright (c) 2016 mbed.org, MIT License |
| 2 | +* |
| 3 | +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software |
| 4 | +* and associated documentation files (the "Software"), to deal in the Software without |
| 5 | +* restriction, including without limitation the rights to use, copy, modify, merge, publish, |
| 6 | +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the |
| 7 | +* Software is furnished to do so, subject to the following conditions: |
| 8 | +* |
| 9 | +* The above copyright notice and this permission notice shall be included in all copies or |
| 10 | +* substantial portions of the Software. |
| 11 | +* |
| 12 | +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING |
| 13 | +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 14 | +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, |
| 15 | +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 16 | +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 17 | +*/ |
| 18 | +#ifndef USBHAL_STM32F769NI_H |
| 19 | +#define USBHAL_STM32F769NI_H |
| 20 | +#define USBHAL_IRQn OTG_HS_IRQn |
| 21 | +/* must be multiple of 4 bytes */ |
| 22 | +#define NB_ENDPOINT 4 |
| 23 | +#define MAXTRANSFER_SIZE 0x200 |
| 24 | +#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE+MAX_PACKET_SIZE_EP0+MAX_PACKET_SIZE_EP1+MAX_PACKET_SIZE_EP2+MAX_PACKET_SIZE_EP3) |
| 25 | +#if (FIFO_USB_RAM_SIZE > 0x500) |
| 26 | +#error "FIFO dimensioning incorrect" |
| 27 | +#endif |
| 28 | + |
| 29 | +typedef struct |
| 30 | +{ |
| 31 | + USBHAL *inst; |
| 32 | + void (USBHAL::*bus_reset)(void); |
| 33 | + void (USBHAL::*sof)(int frame); |
| 34 | + void (USBHAL::*connect_change)(unsigned int connected); |
| 35 | + void (USBHAL::*suspend_change)(unsigned int suspended); |
| 36 | + void (USBHAL::*ep0_setup)(void); |
| 37 | + void (USBHAL::*ep0_in)(void); |
| 38 | + void (USBHAL::*ep0_out)(void); |
| 39 | + void (USBHAL::*ep0_read)(void); |
| 40 | + bool (USBHAL::*ep_realise)(uint8_t endpoint, uint32_t maxPacket, uint32_t flags); |
| 41 | + bool (USBHAL::*epCallback[2*NB_ENDPOINT-2])(void); |
| 42 | + /* memorize dummy buffer used for reception */ |
| 43 | + uint32_t pBufRx[MAXTRANSFER_SIZE>>2]; |
| 44 | + uint32_t pBufRx0[MAX_PACKET_SIZE_EP0>>2]; |
| 45 | + uint8_t epComplete[2*NB_ENDPOINT]; |
| 46 | +}USBHAL_Private_t; |
| 47 | + |
| 48 | +uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo) |
| 49 | +{ |
| 50 | + uint32_t len; |
| 51 | + if (fifo == 0) len = hpcd->Instance->DIEPTXF0_HNPTXFSIZ>>16; |
| 52 | + else |
| 53 | + len = hpcd->Instance->DIEPTXF[fifo - 1] >> 16; |
| 54 | + return len*4; |
| 55 | +} |
| 56 | +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) |
| 57 | +{ |
| 58 | + USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData)); |
| 59 | + USBHAL *obj= priv->inst; |
| 60 | + USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
| 61 | + uint32_t sofnum = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF) >> 8; |
| 62 | + void (USBHAL::*func)(int frame) = priv->sof; |
| 63 | + /* fix me call with same frame number */ |
| 64 | + (obj->*func)(sofnum); |
| 65 | +} |
| 66 | + |
| 67 | + |
| 68 | +USBHAL * USBHAL::instance; |
| 69 | + |
| 70 | +USBHAL::USBHAL(void) { |
| 71 | + /* init parameter */ |
| 72 | + USBHAL_Private_t *HALPriv = new(USBHAL_Private_t); |
| 73 | + hpcd.Instance = USB_OTG_HS; |
| 74 | + memset(&hpcd.Init, 0, sizeof(hpcd.Init)); |
| 75 | + hpcd.Init.dev_endpoints = NB_ENDPOINT; |
| 76 | + hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0; |
| 77 | + hpcd.Init.phy_itface = PCD_PHY_ULPI; |
| 78 | + hpcd.Init.Sof_enable = 0; |
| 79 | + |
| 80 | + hpcd.Init.speed = PCD_SPEED_HIGH; |
| 81 | + //hpcd.Init.vbus_sensing_enable = 0; |
| 82 | + //hpcd.Init.lpm_enable = 0; |
| 83 | + /* pass instance for usage inside call back */ |
| 84 | + HALPriv->inst = this; |
| 85 | + HALPriv->bus_reset = &USBHAL::busReset; |
| 86 | + HALPriv->suspend_change = &USBHAL::suspendStateChanged; |
| 87 | + HALPriv->connect_change = &USBHAL::connectStateChanged; |
| 88 | + HALPriv->sof = &USBHAL::SOF; |
| 89 | + HALPriv->ep0_setup = &USBHAL::EP0setupCallback; |
| 90 | + HALPriv->ep_realise = &USBHAL::realiseEndpoint; |
| 91 | + HALPriv->ep0_in = &USBHAL::EP0in; |
| 92 | + HALPriv->ep0_out = &USBHAL::EP0out; |
| 93 | + HALPriv->ep0_read = &USBHAL::EP0read; |
| 94 | + hpcd.pData = (void*)HALPriv; |
| 95 | + HALPriv->epCallback[0] = &USBHAL::EP1_OUT_callback; |
| 96 | + HALPriv->epCallback[1] = &USBHAL::EP1_IN_callback; |
| 97 | + HALPriv->epCallback[2] = &USBHAL::EP2_OUT_callback; |
| 98 | + HALPriv->epCallback[3] = &USBHAL::EP2_IN_callback; |
| 99 | + HALPriv->epCallback[4] = &USBHAL::EP3_OUT_callback; |
| 100 | + HALPriv->epCallback[5] = &USBHAL::EP3_IN_callback; |
| 101 | + instance = this; |
| 102 | + /* Enable power and clocking */ |
| 103 | + __HAL_RCC_GPIOA_CLK_ENABLE(); |
| 104 | + __HAL_RCC_GPIOB_CLK_ENABLE(); |
| 105 | + __HAL_RCC_GPIOC_CLK_ENABLE(); |
| 106 | + __HAL_RCC_GPIOH_CLK_ENABLE(); |
| 107 | + __HAL_RCC_GPIOI_CLK_ENABLE(); |
| 108 | + |
| 109 | + pin_function(PA_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // CLK |
| 110 | + pin_function(PA_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D0 |
| 111 | + |
| 112 | + pin_function(PB_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D1 |
| 113 | + pin_function(PB_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D2 |
| 114 | + pin_function(PB_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D3 |
| 115 | + pin_function(PB_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D4 |
| 116 | + pin_function(PB_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D5 |
| 117 | + pin_function(PB_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D6 |
| 118 | + pin_function(PB_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // D7 |
| 119 | + |
| 120 | + pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // STP |
| 121 | + pin_function(PH_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // NXT |
| 122 | + pin_function(PI_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_HS)); // DIR |
| 123 | + |
| 124 | + __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE(); |
| 125 | + __HAL_RCC_USB_OTG_HS_CLK_ENABLE(); |
| 126 | + |
| 127 | + __HAL_RCC_SYSCFG_CLK_ENABLE(); |
| 128 | + hpcd.State = HAL_PCD_STATE_RESET; |
| 129 | + HAL_PCD_Init(&hpcd); |
| 130 | + /* 1.25kbytes */ |
| 131 | + /* min value 16 (= 16 x 4 bytes) */ |
| 132 | + /* max value 256 (= 1K bytes ) */ |
| 133 | + /* maximum sum is 0x140 */ |
| 134 | + HAL_PCDEx_SetRxFiFo(&hpcd, (MAXTRANSFER_SIZE/4)); |
| 135 | + /* bulk/int 64 bytes in FS */ |
| 136 | + HAL_PCDEx_SetTxFiFo(&hpcd, 0, (MAX_PACKET_SIZE_EP0/4)+1); |
| 137 | + /* bulk/int bytes in FS */ |
| 138 | + HAL_PCDEx_SetTxFiFo(&hpcd, 1, (MAX_PACKET_SIZE_EP1/4)); |
| 139 | + HAL_PCDEx_SetTxFiFo(&hpcd, 2, (MAX_PACKET_SIZE_EP2/4)); |
| 140 | + /* ISOchronous */ |
| 141 | + HAL_PCDEx_SetTxFiFo(&hpcd, 3, (MAX_PACKET_SIZE_EP3/4)); |
| 142 | + NVIC_SetVector(USBHAL_IRQn, (uint32_t)&_usbisr); |
| 143 | + NVIC_SetPriority(USBHAL_IRQn, 1); |
| 144 | + HAL_PCD_Start(&hpcd); |
| 145 | +} |
| 146 | +#endif |
| 147 | + |
0 commit comments